mirror of
https://github.com/hanzoai/papers.git
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zenlm/papers had a sweeping withdrawal pass, 5deeeaa, and the owner reverted it in f34f609 for asserting more than it verified. That objection sets the rule here: a claim changes only where the proof is in the paper itself or in arithmetic, never because a run could not be found. Twenty-seven of the eighty-one zen papers meet that bar. Every correction quotes a number the paper already carries or one derived from its own numbers by a division a reader can repeat. Twelve papers led with a figure that appears in no row of the table it summarises. zen-agent averaged GAIA 83.1/68.4/42.3 to 71.2 while its four baseline rows are each the plain mean of their own three levels; the mean is 64.6. zen-embeddings-retrieval and zen3-embedding claim MTEB averages of 72.4 and 74.3 over tables that supply their task counts, where the 56-task weighted means are 67.1 and 67.4. zen-mathematical-reasoning opened with five figures, none of them any row, and explained one as best-of-32 sampling when its own sampling table puts best-of-32 at a different number. zen-dso-protocol claimed 94% of centralized quality and a 78% bandwidth cut against tables reading 99.4% and 99.8%-and-better, the second of them the table that claim captions. zen-synthetic-data claimed an 8.4-point MT-Bench gain on a scale that runs to 10, from a 7.84 baseline, where its table says 0.88. zen-3d quoted the Chair column as the ShapeNet result. zen-multilingual understated its own XNLI average. Also zen-hallucination-reduction, zen-distributed-training, zen-finetuning, zen-legal-ai and zen-coder-flash. Eight more are settled by arithmetic against the hardware or the parameter count. zen-nano, zen-eco and zen-scribe each report INT4 needing as much memory as FP16 or more, while their own FP16 and INT8 rows are exactly two and one bytes per parameter; zen_family_overview already carried the right values. The two zen-designer papers size a stated 235B model at 220 GB in FP16, which is a 110B model, and zen-quantization puts the same model at 470 GB. zen-omni and zen-next recommend cards smaller than the memory the same row requires. zen-live captions a latency table to an A10G when its own deployment table assigns that 98 ms to the H100. zen-hardware-optimization calls a throughput table FP8+INT4 when its cumulative table reaches the identical 31,200 tok/s through INT4 + FP16. Six papers share one template whose visual benchmark block bundles two metrics computed over images a model generates with one computed over text a model emits about an image. No model produces all three, and the block went to four papers across four modalities, so each received at least one metric it cannot compute: VQA v2 and a token rate for two diffusion models, FID and CLIP score for two vision-language models. Each now keeps the rows its own stated output type can produce. Throughput is the one category where the defect is the missing condition rather than the number. Decode reads the active weight set once per token, so a single stream cannot outrun bandwidth over footprint, and zen4-mini, zen3-nano and zen-coder-flash all report above their own bound. Batched serving would make those figures legal and none of the three records a batch size, so the numbers stand and each table now carries its bound and the arithmetic behind it. AIME gets the same treatment in zen-mathematical-reasoning: a score that is not a multiple of 1/30 on a 30-problem exam is legal under averaging, and the caption now says which row has its sample count on record and which do not. What was examined and left is in LLM.md with the reason in each case. Training fleets absent from this estate prove nothing about models trained on rented capacity. zen-reranker's 98% semantic preservation is uncited rather than contradicted. zen-safety-evaluation and zen-vision-architecture state no weighting, so their averages are not determined. zen4-coder-flash puts FP8 on an A100, and Ampere has no FP8 tensor cores, but its claims there are footprint claims and FP8 weight-only storage does run on Ampere. All twenty-seven rebuild under latexmk -Werror. Nineteen have diverged from their counterparts in zenlm/papers and six exist only here, so those fixes do not reach the other site. zen-3d and zen-agent were byte-identical across the two repositories until now, and are the two to mirror first. Co-authored-by: Hanzo Dev <[email protected]>
384 lines
15 KiB
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384 lines
15 KiB
TeX
\documentclass[11pt,a4paper]{article}
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\usepackage[utf8]{inputenc}
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\usepackage[T1]{fontenc}
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\usepackage{amsmath,amsfonts,amssymb}
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\usepackage{graphicx}
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\usepackage{hyperref}
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\usepackage{listings}
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\usepackage{color}
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\usepackage{booktabs}
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\usepackage{float}
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\usepackage{geometry}
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\geometry{margin=1in}
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\definecolor{zenblue}{RGB}{41,121,255}
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\hypersetup{colorlinks=true,linkcolor=zenblue,urlcolor=zenblue,citecolor=zenblue}
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\title{\textbf{Zen3-Nano: Third-Generation Ultra-Compact Edge Intelligence}\\
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\large Technical Whitepaper v2025.06}
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\author{Hanzo AI Research, Zen LM Research Team\\
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\texttt{[email protected]}\\
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\href{https://papers.zenlm.org}{papers.zenlm.org}}
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\date{June 2025}
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\begin{document}
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\maketitle
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\begin{abstract}
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Zen3-Nano is the third-generation 0.6B parameter edge model from the Zen family, achieving
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significant quality improvements over Zen-Nano through architectural refinements and enhanced
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knowledge distillation from the full Zen family hierarchy. Built on the Zen MoDE (Mixture of
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Distilled Experts) architecture, Zen3-Nano maintains a sub-250MB quantized footprint while
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delivering improved reasoning capabilities on mobile and embedded hardware. At 4-bit
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quantization the model fits in 250MB and achieves 2800 tokens per second on Apple A16 Bionic
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silicon, enabling real-time language inference at the edge without network connectivity.
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The model sets new state-of-the-art results for the sub-1B parameter class: MMLU 47.3\%,
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TriviaQA 61.2\%, and GSM8K 52.4\%, demonstrating that frontier distillation techniques close
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the gap between edge and server-class models substantially.
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\end{abstract}
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\tableofcontents
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\newpage
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%% -----------------------------------------------------------------------
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\section{Introduction}
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\label{sec:intro}
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On-device AI inference has become a primary deployment target for consumer applications,
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IoT sensors, and privacy-sensitive enterprise workloads. The constraints are severe: models
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must fit within a few hundred megabytes, execute without accelerators on ARM Cortex-class
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CPUs, and return responses in tens of milliseconds. Existing sub-1B approaches sacrifice
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too much quality to be practically useful for general-purpose instruction following.
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Zen3-Nano addresses this challenge by combining three advances:
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\begin{enumerate}
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\item \textbf{Hierarchical Zen MoDE distillation} --- structured distillation cascaded through
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Zen3-Mini (1.7B), Zen3-Small (7B), and Zen3-Medium (14B) teachers, each contributing
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a complementary signal.
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\item \textbf{Third-generation Nano architecture} --- refined attention with grouped-query
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heads optimized for cache reuse on low-memory hardware, reduced KV cache footprint,
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and fused MLPs that lower inference memory bandwidth.
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\item \textbf{BitDelta-aware training} --- the model is trained with quantization-aware
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objectives derived from the Zoo Labs BitDelta protocol (ZIP-007), so the 4-bit
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quantized artifact retains near-full-precision accuracy without post-hoc calibration.
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\end{enumerate}
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Zen3-Nano is designed to run natively on:
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\begin{itemize}
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\item Mobile SoCs (Apple A16 Bionic, Qualcomm Snapdragon 8 Gen 3, MediaTek Dimensity 9300)
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\item Microcontrollers with $\geq$512 KB SRAM (via WASM SIMD runtime)
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\item Browser environments via WebAssembly and WebGPU
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\item Embedded Linux (Raspberry Pi 5, NVIDIA Jetson Nano)
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\end{itemize}
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%% -----------------------------------------------------------------------
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\section{Architecture}
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\label{sec:arch}
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\subsection{Zen MoDE Foundation}
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Zen3-Nano is built on the Zen MoDE (Mixture of Distilled Experts) architecture, a
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design principle shared across the entire Zen family that replaces monolithic dense
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feed-forward blocks with sparsely-activated expert clusters. At the 0.6B scale, MoDE
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manifests as a lightweight routing mechanism that activates a subset of micro-experts
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per token, preserving capacity diversity while keeping the active parameter count
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well below memory limits.
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Formally, for input token representation $\mathbf{x} \in \mathbb{R}^d$, the MoDE feed-forward
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layer computes:
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\begin{equation}
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\text{MoDE}(\mathbf{x}) = \sum_{i \in \mathcal{K}(\mathbf{x})} g_i(\mathbf{x}) \cdot E_i(\mathbf{x})
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\end{equation}
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where $\mathcal{K}(\mathbf{x})$ is the set of top-$k$ activated experts selected by a
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learned routing function, $g_i$ are normalized routing weights, and $E_i$ are the
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expert sub-networks.
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\subsection{Grouped-Query Attention (GQA) Variant}
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Standard multi-head attention at 0.6B scale incurs disproportionate KV cache overhead
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relative to total parameter count. Zen3-Nano uses a 3rd-generation grouped-query attention
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variant with the following configuration:
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\begin{itemize}
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\item 16 query heads grouped into 4 key-value head groups
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\item 1024-dimensional hidden state, 64-dimensional head size
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\item Rotary positional embeddings (RoPE) with extended context via YaRN interpolation
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\item 32 transformer layers with pre-layer normalization (RMSNorm)
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\end{itemize}
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The KV cache per token occupies only 512 bytes at full precision, enabling 32K token
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context windows within 16 MB of SRAM when using 8-bit KV quantization.
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\subsection{Fused MLP Design}
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The feed-forward blocks use a fused SwiGLU activation with weight-sharing across
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adjacent expert pairs, reducing total parameter count by 12\% relative to a naive
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MoDE implementation at equivalent quality:
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\begin{equation}
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\text{FFN}(\mathbf{x}) = \left(\sigma(\mathbf{W}_1 \mathbf{x}) \odot \mathbf{W}_2 \mathbf{x}\right) \mathbf{W}_3
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\end{equation}
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\subsection{Quantization-Native Design}
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Unlike post-hoc quantization, Zen3-Nano is trained with BitDelta quantization-aware
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training from epoch 1. The quantization error $\epsilon_Q$ is included in the training
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loss as a regularizer:
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\begin{equation}
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\mathcal{L}_{\text{total}} = \mathcal{L}_{\text{CE}} + \mathcal{L}_{\text{KD}} + \lambda \cdot \mathbb{E}\left[\|\mathbf{W} - Q(\mathbf{W})\|_F^2\right]
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\end{equation}
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where $Q(\cdot)$ is the 4-bit quantization operator and $\lambda = 0.01$.
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%% -----------------------------------------------------------------------
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\section{Training}
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\label{sec:training}
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\subsection{Pre-Training Data}
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Zen3-Nano is initialized from scratch on a 2T token corpus drawn from:
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\begin{itemize}
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\item Curated web text (Common Crawl quality-filtered): 60\%
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\item Code repositories (GitHub, GitLab, permissive licenses): 20\%
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\item Books, academic papers, structured knowledge: 15\%
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\item Multilingual data (50+ languages, weighted by speaker population): 5\%
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\end{itemize}
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\subsection{Hierarchical Distillation}
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After base pre-training, Zen3-Nano undergoes a three-stage distillation curriculum:
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\textbf{Stage 1 (Token-level KL distillation)}: Soft targets from Zen3-Mini (1.7B) teacher
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over 500B tokens. Temperature $T=4.0$, KD weight $\alpha = 0.7$.
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\textbf{Stage 2 (Layer-level representation matching)}: Intermediate hidden states
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from Zen3-Small (7B) are used as representation targets via a learned projection head.
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Loss: cosine similarity maximization over layers $\{6, 12, 18, 24\}$.
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\textbf{Stage 3 (Reasoning chain distillation)}: Structured chain-of-thought traces
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generated by Zen3-Medium (14B) are used for supervised fine-tuning with a 3:1
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ratio of distilled traces to human annotations.
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\subsection{Instruction Fine-Tuning}
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Post-distillation instruction tuning uses a 50M token mix:
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\begin{itemize}
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\item General instruction following: 40\%
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\item Code generation and debugging: 25\%
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\item Mathematical reasoning (chain-of-thought): 20\%
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\item Multilingual instruction: 15\%
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\end{itemize}
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Training uses AdamW optimizer, peak learning rate $3 \times 10^{-4}$, cosine decay,
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batch size 512, over 3 epochs on the instruction mix.
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\subsection{RLHF and Constitutional Alignment}
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A lightweight RLHF pass using PPO with a 0.6B reward model (trained separately)
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is applied for 10K steps to reduce harmful outputs and improve instruction adherence,
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keeping the KL divergence from the SFT checkpoint below 0.1 nats.
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%% -----------------------------------------------------------------------
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\section{Evaluation}
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\label{sec:eval}
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\subsection{Language Understanding}
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\begin{table}[H]
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\centering
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\caption{Zen3-Nano vs. sub-1B baselines on core language benchmarks}
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\begin{tabular}{lcccc}
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\toprule
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\textbf{Model} & \textbf{Params} & \textbf{MMLU} & \textbf{TriviaQA} & \textbf{HellaSwag} \\
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\midrule
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Prior Zen-Nano & 0.5B & 39.1 & 53.4 & 61.2 \\
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Zen2-Nano & 0.6B & 43.7 & 57.8 & 66.4 \\
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\textbf{Zen3-Nano} & \textbf{0.6B} & \textbf{47.3} & \textbf{61.2} & \textbf{70.8} \\
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\bottomrule
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\end{tabular}
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\label{tab:lang}
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\end{table}
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\subsection{Mathematical Reasoning}
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\begin{table}[H]
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\centering
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\caption{Mathematical reasoning benchmarks}
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\begin{tabular}{lcccc}
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\toprule
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\textbf{Model} & \textbf{GSM8K} & \textbf{MATH} & \textbf{MGSM (avg)} & \textbf{ARC-C} \\
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\midrule
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Zen-Nano & 38.2 & 11.3 & 31.4 & 54.1 \\
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Zen2-Nano & 44.6 & 15.7 & 38.9 & 59.3 \\
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\textbf{Zen3-Nano} & \textbf{52.4} & \textbf{20.1} & \textbf{46.2} & \textbf{64.7} \\
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\bottomrule
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\end{tabular}
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\label{tab:math}
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\end{table}
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\subsection{Code Generation}
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\begin{table}[H]
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\centering
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\caption{Code generation benchmarks (pass@1)}
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\begin{tabular}{lccc}
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\toprule
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\textbf{Model} & \textbf{HumanEval} & \textbf{MBPP} & \textbf{LiveCodeBench} \\
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\midrule
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Zen-Nano & 28.0 & 33.2 & 12.4 \\
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Zen2-Nano & 34.1 & 40.5 & 18.7 \\
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\textbf{Zen3-Nano} & \textbf{42.7} & \textbf{49.3} & \textbf{26.1} \\
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\bottomrule
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\end{tabular}
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\label{tab:code}
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\end{table}
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\subsection{Inference Performance}
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\begin{table}[H]
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\centering
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\caption{Inference throughput across hardware targets (4-bit quantized). Batch size
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is not recorded, and the ms/tok column is the reciprocal of the tokens/second column
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rather than a separate measurement. One decode stream reads the resident weights once
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per token, which on the 4090 row (950 MB, 1{,}008 GB/s) bounds a single stream at about
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1{,}060 tokens per second.}
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\begin{tabular}{lcccc}
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\toprule
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\textbf{Hardware} & \textbf{Precision} & \textbf{Tok/s} & \textbf{RAM (MB)} & \textbf{Latency (ms/tok)} \\
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\midrule
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Apple A16 Bionic & INT4 & 2800 & 248 & 0.36 \\
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Snapdragon 8 Gen 3 & INT4 & 2340 & 248 & 0.43 \\
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Raspberry Pi 5 & INT4 & 420 & 248 & 2.38 \\
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WASM SIMD (browser) & INT4 & 310 & 248 & 3.23 \\
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x86-64 (laptop CPU) & INT4 & 1100 & 248 & 0.91 \\
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NVIDIA RTX 4090 & FP16 & 8400 & 950 & 0.12 \\
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\bottomrule
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\end{tabular}
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\label{tab:perf}
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\end{table}
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\subsection{Multilingual Performance}
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\begin{table}[H]
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\centering
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\caption{Multilingual benchmark (FLORES-200, spBLEU)}
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\begin{tabular}{lcc}
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\toprule
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\textbf{Language Pair} & \textbf{Zen3-Nano} & \textbf{Zen2-Nano} \\
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\midrule
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English $\to$ Chinese & 24.3 & 20.1 \\
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English $\to$ Spanish & 31.8 & 27.4 \\
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English $\to$ Arabic & 18.9 & 14.7 \\
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English $\to$ Japanese & 21.4 & 17.2 \\
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Average (50 pairs) & 22.6 & 18.4 \\
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\bottomrule
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\end{tabular}
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\label{tab:multilingual}
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\end{table}
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%% -----------------------------------------------------------------------
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\section{Related Work}
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\label{sec:related}
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\subsection{Small Language Models}
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Research on sub-1B language models has accelerated as mobile deployment became
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commercially viable. Early work demonstrated that aggressive distillation from
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multi-billion parameter teachers could recover a substantial fraction of performance
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at a fraction of the parameter count~\cite{hinton2015distilling}. Subsequent work
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explored architectural modifications specifically suited to on-device constraints,
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including weight sharing, structured pruning, and low-rank factorization.
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\subsection{Quantization-Aware Training}
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Post-training quantization (PTQ) has become the default for edge deployment, but
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accuracy degradation at 4-bit is nontrivial for small models where the per-parameter
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information density is already high. BitDelta (ZIP-007) addresses this by encoding
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quantization error as an explicit training signal, showing that models trained
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quantization-natively outperform PTQ equivalents by 2--5 percentage points on
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reasoning benchmarks at 4-bit precision.
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\subsection{Knowledge Distillation Hierarchies}
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Prior work on hierarchical distillation~\cite{mirzadeh2020improved} demonstrated that
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using an intermediate ``teacher assistant'' model reduces the capacity gap and improves
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distillation efficiency. Zen3-Nano extends this to a three-level cascade, exploiting
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the full Zen family model hierarchy.
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%% -----------------------------------------------------------------------
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\section{Deployment and Runtime}
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\label{sec:deploy}
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\subsection{Supported Runtimes}
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Zen3-Nano ships with native support for:
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\begin{itemize}
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\item \textbf{llama.cpp} --- GGUF format, Q4\_K\_M quantization
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\item \textbf{ONNX Runtime} --- optimized for ARM and x86 SIMD
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\item \textbf{WebAssembly} --- via wasm-pack compiled inference engine
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\item \textbf{Core ML} --- iOS/macOS native accelerated inference
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\item \textbf{TensorFlow Lite} --- Android NPU acceleration
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\end{itemize}
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\subsection{Context Length}
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Default context window: 8192 tokens (configurable to 32K via YaRN at cost of
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increased RAM). At 32K context, KV cache occupies approximately 64 MB at INT8.
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\subsection{API Compatibility}
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Zen3-Nano exposes an OpenAI-compatible API when deployed via the Zen LM inference
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server, enabling drop-in replacement for any OpenAI SDK client.
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%% -----------------------------------------------------------------------
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\section{Conclusion}
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\label{sec:conclusion}
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Zen3-Nano establishes a new state of the art for sub-1B parameter language models
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through hierarchical Zen MoDE distillation, quantization-native training, and
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architectural refinements that maximize inference efficiency on ARM-class hardware.
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The model achieves MMLU 47.3\%, TriviaQA 61.2\%, and GSM8K 52.4\% --- results
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that would have required 3--7B parameter models in prior generations --- while
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fitting within 250 MB at 4-bit precision and achieving 2800 tok/s on Apple A16
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Bionic.
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Future work will target 1M token context windows via ring attention approximations
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suitable for low-memory hardware, and extended multimodal understanding via
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lightweight vision adapters compatible with the Zen3-Omni decoder.
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\section*{Acknowledgments}
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The authors thank the Zoo Labs Foundation for compute allocation and the DSO
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research network for benchmark curation and evaluation infrastructure.
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\bibliographystyle{plain}
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\begin{thebibliography}{9}
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\bibitem{hinton2015distilling}
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G. Hinton, O. Vinyals, and J. Dean,
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``Distilling the Knowledge in a Neural Network,''
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\textit{NIPS Deep Learning Workshop}, 2015.
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\bibitem{mirzadeh2020improved}
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S. I. Mirzadeh et al.,
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``Improved Knowledge Distillation via Teacher Assistant,''
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\textit{AAAI}, 2020.
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\bibitem{zip007}
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Zoo Labs Foundation,
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``ZIP-007: BitDelta --- Quantization-Aware Delta Compression for Language Models,''
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\textit{Zoo Improvement Proposals}, 2024.
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\href{https://zips.zoo.ngo/zip-007}{zips.zoo.ngo/zip-007}
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\bibitem{hip002}
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Hanzo AI,
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``HIP-002: Active Semantic Optimization (ASO),''
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\textit{Hanzo Improvement Proposals}, 2024.
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\end{thebibliography}
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\end{document}
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