mirror of
https://github.com/hanzoai/visor.git
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Konstantin BogomolovandgVisor bot
2313eeeeff
KVM on ARM64 defaults to 40-bit IPA, but can be dynamically limited by the host. Previously, we assumed a fixed 40-bit IPA and used large fault block sizes (up to 4TB), which could lead to GPAs exceeding the guest's IPA space. This caused sentry to crash with "set memory region failed" (EFAULT/EINVAL) during platform initialization. Fix this by: 1. Dynamically detecting host max IPA and limiting PhysicalAddressBits (up to 40). 2. Reducing faultBlockSize to 1GB (from 8GB) on ARM64 if IPA is <= 39-bit to pack GPAs tighter. PiperOrigin-RevId: 944592838
113 lines
2.3 KiB
Go
113 lines
2.3 KiB
Go
// Copyright 2019 The gVisor Authors.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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//go:build arm64
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package ring0
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const (
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// VirtualAddressBits is fixed at 48.
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VirtualAddressBits = 48
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)
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var (
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// PhysicalAddressBits is the number of bits available in the physical
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// address space. On ARM64, this is dynamically limited by the host KVM IPA size,
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// up to a maximum of 40 bits.
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PhysicalAddressBits uintptr = 40
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)
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const (
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// DAIF bits:debug, sError, IRQ, FIQ.
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_PSR_D_BIT = 0x00000200
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_PSR_A_BIT = 0x00000100
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_PSR_I_BIT = 0x00000080
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_PSR_F_BIT = 0x00000040
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_PSR_DAIF_SHIFT = 6
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_PSR_DAIF_MASK = 0xf << _PSR_DAIF_SHIFT
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// PSR bits.
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_PSR_MODE_EL0t = 0x00000000
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_PSR_MODE_EL1t = 0x00000004
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_PSR_MODE_EL1h = 0x00000005
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_PSR_MODE_MASK = 0x0000000f
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PsrFlagsClear = _PSR_MODE_MASK | _PSR_DAIF_MASK
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PsrModeMask = _PSR_MODE_MASK
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// KernelFlagsSet should always be set in the kernel.
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KernelFlagsSet = _PSR_MODE_EL1h | _PSR_D_BIT | _PSR_A_BIT | _PSR_I_BIT | _PSR_F_BIT
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// UserFlagsSet are always set in userspace.
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UserFlagsSet = _PSR_MODE_EL0t
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)
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// Vector is an exception vector.
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type Vector uintptr
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// Exception vectors.
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const (
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El1InvSync = iota
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El1InvIrq
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El1InvFiq
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El1InvError
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El1Sync
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El1Irq
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El1Fiq
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El1Err
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El0Sync
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El0Irq
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El0Fiq
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El0Err
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El0InvSync
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El0InvIrq
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El0InvFiq
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El0InvErr
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El1SyncDa
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El1SyncIa
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El1SyncSpPc
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El1SyncUndef
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El1SyncDbg
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El1SyncInv
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El0SyncSVC
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El0SyncDa
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El0SyncIa
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El0SyncFpsimdAcc
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El0SyncSveAcc
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El0SyncFpsimdExc
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El0SyncSys
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El0SyncSpPc
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El0SyncUndef
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El0SyncDbg
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El0SyncWfx
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El0SyncInv
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El0ErrNMI
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El0ErrBounce
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_NR_INTERRUPTS
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)
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// System call vectors.
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const (
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Syscall Vector = El0SyncSVC
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PageFault Vector = El0SyncDa
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VirtualizationException Vector = El0ErrBounce
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)
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