mirror of
https://github.com/hanzoai/visor.git
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Initializing threads via a custom Systrap entrypoint (as was done on x86 prior to this CL) is incompatible with debuggers, because they set the single-step flag. If a brand new stub thread managed to pick up an already existing context with this flag set, it would immediately invoke the sighandler upon restoring RFLAGS, which would corrupt the stack and instruction pointers. PiperOrigin-RevId: 761250233
490 lines
18 KiB
C
490 lines
18 KiB
C
// Copyright 2020 The gVisor Authors.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#define _GNU_SOURCE
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#include <asm/prctl.h>
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#include <asm/unistd_64.h>
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#include <errno.h>
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#include <linux/audit.h>
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#include <linux/futex.h>
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#include <linux/unistd.h>
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#include <signal.h>
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#include <stdbool.h>
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#include <stddef.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <sys/prctl.h>
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#include <sys/ucontext.h>
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#include "atomic.h"
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#include "sysmsg.h"
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#include "sysmsg_offsets.h"
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#include "sysmsg_offsets_amd64.h"
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#ifndef X86_TRAP_PF
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#define X86_TRAP_PF 14
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#endif
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// TODO(b/271631387): These globals are shared between AMD64 and ARM64; move to
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// sysmsg_lib.c.
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struct arch_state __export_arch_state;
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uint64_t __export_stub_start;
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uint64_t __export_disable_syscall_patching;
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long __syscall(long n, long a1, long a2, long a3, long a4, long a5, long a6) {
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unsigned long ret;
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register long r10 __asm__("r10") = a4;
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register long r8 __asm__("r8") = a5;
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register long r9 __asm__("r9") = a6;
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__asm__ __volatile__("syscall"
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: "=a"(ret)
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: "a"(n), "D"(a1), "S"(a2), "d"(a3), "r"(r10), "r"(r8),
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"r"(r9)
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: "rcx", "r11", "memory");
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return ret;
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}
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long sys_futex(uint32_t *addr, int op, int val, struct __kernel_timespec *tv,
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uint32_t *addr2, int val3) {
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return __syscall(__NR_futex, (long)addr, (long)op, (long)val, (long)tv,
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(long)addr2, (long)val3);
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}
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union csgsfs {
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uint64_t csgsfs; // REG_CSGSFS
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struct {
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uint16_t cs;
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uint16_t gs;
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uint16_t fs;
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uint16_t ss;
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};
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};
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static void gregs_to_ptregs(ucontext_t *ucontext,
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struct user_regs_struct *ptregs) {
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union csgsfs csgsfs = {.csgsfs = ucontext->uc_mcontext.gregs[REG_CSGSFS]};
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// Set all registers except:
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// * fs_base and gs_base, because they can be only changed by arch_prctl.
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// * DS and ES are not used on x86_64.
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ptregs->r15 = ucontext->uc_mcontext.gregs[REG_R15];
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ptregs->r14 = ucontext->uc_mcontext.gregs[REG_R14];
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ptregs->r13 = ucontext->uc_mcontext.gregs[REG_R13];
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ptregs->r12 = ucontext->uc_mcontext.gregs[REG_R12];
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ptregs->rbp = ucontext->uc_mcontext.gregs[REG_RBP];
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ptregs->rbx = ucontext->uc_mcontext.gregs[REG_RBX];
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ptregs->r11 = ucontext->uc_mcontext.gregs[REG_R11];
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ptregs->r10 = ucontext->uc_mcontext.gregs[REG_R10];
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ptregs->r9 = ucontext->uc_mcontext.gregs[REG_R9];
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ptregs->r8 = ucontext->uc_mcontext.gregs[REG_R8];
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ptregs->rax = ucontext->uc_mcontext.gregs[REG_RAX];
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ptregs->rcx = ucontext->uc_mcontext.gregs[REG_RCX];
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ptregs->rdx = ucontext->uc_mcontext.gregs[REG_RDX];
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ptregs->rsi = ucontext->uc_mcontext.gregs[REG_RSI];
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ptregs->rdi = ucontext->uc_mcontext.gregs[REG_RDI];
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ptregs->rip = ucontext->uc_mcontext.gregs[REG_RIP];
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ptregs->eflags = ucontext->uc_mcontext.gregs[REG_EFL];
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ptregs->rsp = ucontext->uc_mcontext.gregs[REG_RSP];
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ptregs->cs = csgsfs.cs;
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ptregs->ss = csgsfs.ss;
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ptregs->fs = csgsfs.fs;
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ptregs->gs = csgsfs.gs;
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}
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static void ptregs_to_gregs(ucontext_t *ucontext,
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struct user_regs_struct *ptregs) {
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union csgsfs csgsfs = {.csgsfs = ucontext->uc_mcontext.gregs[REG_CSGSFS]};
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ucontext->uc_mcontext.gregs[REG_R15] = ptregs->r15;
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ucontext->uc_mcontext.gregs[REG_R14] = ptregs->r14;
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ucontext->uc_mcontext.gregs[REG_R13] = ptregs->r13;
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ucontext->uc_mcontext.gregs[REG_R12] = ptregs->r12;
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ucontext->uc_mcontext.gregs[REG_RBP] = ptregs->rbp;
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ucontext->uc_mcontext.gregs[REG_RBX] = ptregs->rbx;
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ucontext->uc_mcontext.gregs[REG_R11] = ptregs->r11;
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ucontext->uc_mcontext.gregs[REG_R10] = ptregs->r10;
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ucontext->uc_mcontext.gregs[REG_R9] = ptregs->r9;
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ucontext->uc_mcontext.gregs[REG_R8] = ptregs->r8;
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ucontext->uc_mcontext.gregs[REG_RAX] = ptregs->rax;
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ucontext->uc_mcontext.gregs[REG_RCX] = ptregs->rcx;
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ucontext->uc_mcontext.gregs[REG_RDX] = ptregs->rdx;
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ucontext->uc_mcontext.gregs[REG_RSI] = ptregs->rsi;
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ucontext->uc_mcontext.gregs[REG_RDI] = ptregs->rdi;
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ucontext->uc_mcontext.gregs[REG_RIP] = ptregs->rip;
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ucontext->uc_mcontext.gregs[REG_EFL] = ptregs->eflags;
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ucontext->uc_mcontext.gregs[REG_RSP] = ptregs->rsp;
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csgsfs.cs = ptregs->cs;
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csgsfs.ss = ptregs->ss;
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csgsfs.fs = ptregs->fs;
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csgsfs.gs = ptregs->gs;
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ucontext->uc_mcontext.gregs[REG_CSGSFS] = csgsfs.csgsfs;
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}
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// get_fsbase writes the current thread's fsbase value to ptregs.
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static uint64_t get_fsbase(void) {
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uint64_t fsbase;
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if (__export_arch_state.fsgsbase) {
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asm volatile("rdfsbase %0" : "=r"(fsbase));
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} else {
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int ret =
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__syscall(__NR_arch_prctl, ARCH_GET_FS, (long)&fsbase, 0, 0, 0, 0);
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if (ret) {
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panic(STUB_ERROR_ARCH_PRCTL, ret);
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}
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}
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return fsbase;
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}
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// set_fsbase sets the current thread's fsbase to the fsbase value in ptregs.
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static void set_fsbase(uint64_t fsbase) {
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if (__export_arch_state.fsgsbase) {
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asm volatile("wrfsbase %0" : : "r"(fsbase) : "memory");
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} else {
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int ret = __syscall(__NR_arch_prctl, ARCH_SET_FS, fsbase, 0, 0, 0, 0);
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if (ret) {
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panic(STUB_ERROR_ARCH_PRCTL, ret);
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}
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}
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}
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// switch_context_amd64 is a wrapper of switch_context() which does checks
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// specific to amd64.
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struct thread_context *switch_context_amd64(
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struct sysmsg *sysmsg, struct thread_context *ctx,
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enum context_state new_context_state) {
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// NOTE: Both ctx and old_ctx may not be valid and should not be dereferenced.
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struct thread_context *old_ctx = sysmsg->context;
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for (;;) {
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ctx = switch_context(sysmsg, ctx, new_context_state);
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// After setting THREAD_STATE_NONE, syshandled can be interrupted by
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// SIGCHLD. In this case, we consider that the current context contains
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// the actual state and sighandler can take control on it.
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atomic_store(&sysmsg->state, THREAD_STATE_NONE);
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if (atomic_load(&ctx->interrupt) != 0) {
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atomic_store(&sysmsg->state, THREAD_STATE_PREP);
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// This context got interrupted while it was waiting in the queue.
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// Setup all the necessary bits to let the sentry know this context has
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// switched back because of it.
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atomic_store(&ctx->interrupt, 0);
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new_context_state = CONTEXT_STATE_FAULT;
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ctx->signo = SIGCHLD;
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ctx->siginfo.si_signo = SIGCHLD;
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ctx->ptregs.orig_rax = -1;
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} else {
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break;
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}
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}
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if (old_ctx != ctx || ctx->last_thread_id != sysmsg->thread_id) {
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ctx->fpstate_changed = 1;
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}
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return ctx;
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}
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static void prep_fpstate_for_sigframe(void *buf, uint32_t user_size,
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bool use_xsave);
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void __export_sighandler(int signo, siginfo_t *siginfo, void *_ucontext) {
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ucontext_t *ucontext = _ucontext;
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void *sp = sysmsg_sp();
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struct sysmsg *sysmsg = sysmsg_addr(sp);
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if (sysmsg != sysmsg->self) panic(STUB_ERROR_BAD_SYSMSG, 0);
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int32_t thread_state = atomic_load(&sysmsg->state);
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struct thread_context *ctx = NULL;
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enum context_state ctx_state = CONTEXT_STATE_INVALID;
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long fs_base = 0;
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if (thread_state == THREAD_STATE_INITIALIZING) {
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// Find a new context and exit to restore it.
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init_new_thread();
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goto init;
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}
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ctx = sysmsg->context;
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// If the current thread is in syshandler, an interrupt has to be postponed,
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// because sysmsg can't be changed.
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if (signo == SIGCHLD && thread_state != THREAD_STATE_NONE) {
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return;
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}
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// Handle faults in syshandler.
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if ((signo == SIGSEGV || signo == SIGBUS) && sysmsg->fault_jump) {
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ucontext->uc_mcontext.gregs[REG_RIP] += sysmsg->fault_jump;
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sysmsg->fault_jump = 0;
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return;
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}
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fs_base = get_fsbase();
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ctx->signo = signo;
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ctx->siginfo = *siginfo;
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// syshandler sets THREAD_STATE_NONE right before it starts resuming a
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// context. It means the context contains the actual state, and the state of
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// the stub thread is incomplete.
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if (signo != SIGCHLD ||
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ucontext->uc_mcontext.gregs[REG_RIP] < __export_stub_start) {
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ctx->ptregs.fs_base = fs_base;
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ctx->err = 0;
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gregs_to_ptregs(ucontext, &ctx->ptregs);
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memcpy(ctx->fpstate, (uint8_t *)ucontext->uc_mcontext.fpregs,
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__export_arch_state.fp_len);
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}
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switch (signo) {
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case SIGSYS: {
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ctx_state = CONTEXT_STATE_SYSCALL;
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// Check whether this syscall can be replaced on a function call or not.
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// If a syscall instruction set is "mov sysno, %eax, syscall", it can be
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// replaced on a function call which works much faster.
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// Look at pkg/sentry/usertrap for more details.
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if (__export_disable_syscall_patching == 0 &&
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siginfo->si_arch == AUDIT_ARCH_X86_64) {
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uint8_t *rip = (uint8_t *)ctx->ptregs.rip;
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// FIXME(b/144063246): Even if all five bytes before the syscall
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// instruction match the "mov sysno, %eax" instruction, they can be a
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// part of a longer instruction. Here is not easy way to decode x86
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// instructions in reverse.
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uint64_t syscall_code_int[2];
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uint8_t *syscall_code = (uint8_t *)&syscall_code_int[0];
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// We need to receive 5 bytes before the syscall instruction, but they
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// are not aligned, so we can't read them atomically. Let's read them
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// twice. If the second copy will not contain the FAULT_OPCODE, this
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// will mean that the first copy is in the consistent state.
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for (int i = 0; i < 2; i++) {
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// fault_jump is set to the size of "mov (%rbx)" which is 3 bytes.
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atomic_store(&sysmsg->fault_jump, 3);
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asm volatile("movq (%1), %0\n"
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: "=a"(syscall_code_int[i])
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: "b"(rip - 8)
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: "cc", "memory");
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atomic_store(&sysmsg->fault_jump, 0);
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}
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// The mov instruction is 5 bytes: b8 <sysno, 4 bytes>.
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// The syscall instruction is 2 bytes: 0f 05.
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uint32_t sysno = *(uint32_t *)(syscall_code + 2);
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int need_trap = *(syscall_code + 6) == 0x0f && // syscall
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*(syscall_code + 7) == 0x05 &&
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*(syscall_code + 1) == 0xb8 && // mov sysno, %eax
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sysno == siginfo->si_syscall &&
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sysno == ctx->ptregs.rax;
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// Restart syscall if it has been patched by another thread. When a
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// syscall instruction set is replaced on a function call, all threads
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// have to call it via the function call. Otherwise the syscall will not
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// be restarted properly if it will be interrupted by signal.
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syscall_code = (uint8_t *)&syscall_code_int[1];
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uint8_t syscall_opcode = *(syscall_code + 6);
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// A binary patch is built so that the first byte of the syscall
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// instruction is changed on the invalid instruction. If we meet this
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// case, this means that another thread has been patched this syscall
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// and we need to restart it.
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if (syscall_opcode == FAULT_OPCODE) {
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ucontext->uc_mcontext.gregs[REG_RIP] -= 7;
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return;
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}
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if (need_trap) {
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// This syscall can be replaced on the function call.
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ctx_state = CONTEXT_STATE_SYSCALL_NEED_TRAP;
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}
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}
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ctx->ptregs.orig_rax = ctx->ptregs.rax;
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ctx->ptregs.rax = (unsigned long)-ENOSYS;
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if (siginfo->si_arch != AUDIT_ARCH_X86_64)
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// gVisor doesn't support x32 system calls, so let's change the syscall
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// number so that it returns ENOSYS.
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ctx->ptregs.orig_rax += 0x86000000;
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break;
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}
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case SIGSEGV:
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if (ucontext->uc_mcontext.gregs[REG_TRAPNO] == X86_TRAP_PF) {
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ctx->err = ucontext->uc_mcontext.gregs[REG_ERR];
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}
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// fallthrough
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case SIGCHLD:
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case SIGBUS:
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case SIGFPE:
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case SIGTRAP:
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case SIGILL:
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ctx->ptregs.orig_rax = -1;
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ctx_state = CONTEXT_STATE_FAULT;
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break;
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default:
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return;
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}
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atomic_store(&ctx->fpstate_changed, 0);
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init:
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ctx = switch_context_amd64(sysmsg, ctx, ctx_state);
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if (fs_base != ctx->ptregs.fs_base) {
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set_fsbase(ctx->ptregs.fs_base);
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}
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if (atomic_load(&ctx->fpstate_changed)) {
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prep_fpstate_for_sigframe(
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ctx->fpstate, __export_arch_state.fp_len,
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__export_arch_state.xsave_mode != XSAVE_MODE_FXSAVE);
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ucontext->uc_mcontext.fpregs = (void *)ctx->fpstate;
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}
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ptregs_to_gregs(ucontext, &ctx->ptregs);
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}
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void __syshandler() {
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struct sysmsg *sysmsg;
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asm volatile("movq %%gs:0, %0\n" : "=r"(sysmsg) : :);
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// SYSMSG_STATE_PREP is set to postpone interrupts. Look at
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// __export_sighandler for more details.
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int state = atomic_load(&sysmsg->state);
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if (state != THREAD_STATE_PREP) panic(STUB_ERROR_BAD_THREAD_STATE, 0);
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struct thread_context *ctx = sysmsg->context;
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enum context_state ctx_state = CONTEXT_STATE_SYSCALL_TRAP;
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ctx->signo = SIGSYS;
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ctx->siginfo.si_addr = 0;
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ctx->siginfo.si_syscall = ctx->ptregs.rax;
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ctx->ptregs.rax = (unsigned long)-ENOSYS;
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long fs_base = get_fsbase();
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ctx->ptregs.fs_base = fs_base;
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atomic_store(&ctx->fpstate_changed, 0);
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ctx = switch_context_amd64(sysmsg, ctx, ctx_state);
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// switch_context_amd64 changed sysmsg->state to THREAD_STATE_NONE, so we can
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// only resume the current process, all other actions are
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// prohibited after this point.
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if (fs_base != ctx->ptregs.fs_base) {
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set_fsbase(ctx->ptregs.fs_base);
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}
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}
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// asm_restore_state is implemented in syshandler_amd64.S
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void asm_restore_state();
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// On x86 restore_state jumps straight to user code and does not return.
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void restore_state(struct sysmsg *sysmsg, struct thread_context *ctx,
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void *unused) {
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set_fsbase(ctx->ptregs.fs_base);
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asm_restore_state();
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}
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void verify_offsets_amd64() {
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#define PTREGS_OFFSET offsetof(struct thread_context, ptregs)
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BUILD_BUG_ON(offsetof_thread_context_ptregs != PTREGS_OFFSET);
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BUILD_BUG_ON(offsetof_thread_context_ptregs_r15 !=
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(offsetof(struct user_regs_struct, r15) + PTREGS_OFFSET));
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BUILD_BUG_ON(offsetof_thread_context_ptregs_r14 !=
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(offsetof(struct user_regs_struct, r14) + PTREGS_OFFSET));
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BUILD_BUG_ON(offsetof_thread_context_ptregs_r13 !=
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(offsetof(struct user_regs_struct, r13) + PTREGS_OFFSET));
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BUILD_BUG_ON(offsetof_thread_context_ptregs_r12 !=
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(offsetof(struct user_regs_struct, r12) + PTREGS_OFFSET));
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BUILD_BUG_ON(offsetof_thread_context_ptregs_rbp !=
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(offsetof(struct user_regs_struct, rbp) + PTREGS_OFFSET));
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BUILD_BUG_ON(offsetof_thread_context_ptregs_rbx !=
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(offsetof(struct user_regs_struct, rbx) + PTREGS_OFFSET));
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BUILD_BUG_ON(offsetof_thread_context_ptregs_r11 !=
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(offsetof(struct user_regs_struct, r11) + PTREGS_OFFSET));
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BUILD_BUG_ON(offsetof_thread_context_ptregs_r10 !=
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(offsetof(struct user_regs_struct, r10) + PTREGS_OFFSET));
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BUILD_BUG_ON(offsetof_thread_context_ptregs_r9 !=
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(offsetof(struct user_regs_struct, r9) + PTREGS_OFFSET));
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BUILD_BUG_ON(offsetof_thread_context_ptregs_r8 !=
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(offsetof(struct user_regs_struct, r8) + PTREGS_OFFSET));
|
|
BUILD_BUG_ON(offsetof_thread_context_ptregs_rax !=
|
|
(offsetof(struct user_regs_struct, rax) + PTREGS_OFFSET));
|
|
BUILD_BUG_ON(offsetof_thread_context_ptregs_rcx !=
|
|
(offsetof(struct user_regs_struct, rcx) + PTREGS_OFFSET));
|
|
BUILD_BUG_ON(offsetof_thread_context_ptregs_rdx !=
|
|
(offsetof(struct user_regs_struct, rdx) + PTREGS_OFFSET));
|
|
BUILD_BUG_ON(offsetof_thread_context_ptregs_rsi !=
|
|
(offsetof(struct user_regs_struct, rsi) + PTREGS_OFFSET));
|
|
BUILD_BUG_ON(offsetof_thread_context_ptregs_rdi !=
|
|
(offsetof(struct user_regs_struct, rdi) + PTREGS_OFFSET));
|
|
BUILD_BUG_ON(offsetof_thread_context_ptregs_orig_rax !=
|
|
(offsetof(struct user_regs_struct, orig_rax) + PTREGS_OFFSET));
|
|
BUILD_BUG_ON(offsetof_thread_context_ptregs_rip !=
|
|
(offsetof(struct user_regs_struct, rip) + PTREGS_OFFSET));
|
|
BUILD_BUG_ON(offsetof_thread_context_ptregs_cs !=
|
|
(offsetof(struct user_regs_struct, cs) + PTREGS_OFFSET));
|
|
BUILD_BUG_ON(offsetof_thread_context_ptregs_eflags !=
|
|
(offsetof(struct user_regs_struct, eflags) + PTREGS_OFFSET));
|
|
BUILD_BUG_ON(offsetof_thread_context_ptregs_rsp !=
|
|
(offsetof(struct user_regs_struct, rsp) + PTREGS_OFFSET));
|
|
BUILD_BUG_ON(offsetof_thread_context_ptregs_ss !=
|
|
(offsetof(struct user_regs_struct, ss) + PTREGS_OFFSET));
|
|
BUILD_BUG_ON(offsetof_thread_context_ptregs_fs_base !=
|
|
(offsetof(struct user_regs_struct, fs_base) + PTREGS_OFFSET));
|
|
BUILD_BUG_ON(offsetof_thread_context_ptregs_gs_base !=
|
|
(offsetof(struct user_regs_struct, gs_base) + PTREGS_OFFSET));
|
|
BUILD_BUG_ON(offsetof_thread_context_ptregs_ds !=
|
|
(offsetof(struct user_regs_struct, ds) + PTREGS_OFFSET));
|
|
BUILD_BUG_ON(offsetof_thread_context_ptregs_es !=
|
|
(offsetof(struct user_regs_struct, es) + PTREGS_OFFSET));
|
|
BUILD_BUG_ON(offsetof_thread_context_ptregs_fs !=
|
|
(offsetof(struct user_regs_struct, fs) + PTREGS_OFFSET));
|
|
BUILD_BUG_ON(offsetof_thread_context_ptregs_gs !=
|
|
(offsetof(struct user_regs_struct, gs) + PTREGS_OFFSET));
|
|
#undef PTREGS_OFFSET
|
|
}
|
|
|
|
// asm/sigcontext.h conflicts with signal.h.
|
|
struct __fpx_sw_bytes {
|
|
uint32_t magic1;
|
|
uint32_t extended_size;
|
|
uint64_t xfeatures;
|
|
uint32_t xstate_size;
|
|
uint32_t padding[7];
|
|
};
|
|
|
|
struct __fpstate {
|
|
uint16_t cwd;
|
|
uint16_t swd;
|
|
uint16_t twd;
|
|
uint16_t fop;
|
|
uint64_t rip;
|
|
uint64_t rdp;
|
|
uint32_t mxcsr;
|
|
uint32_t mxcsr_mask;
|
|
uint32_t st_space[32];
|
|
uint32_t xmm_space[64];
|
|
uint32_t reserved2[12];
|
|
struct __fpx_sw_bytes sw_reserved;
|
|
};
|
|
|
|
// The kernel expects to see some additional info in an FPU state. More details
|
|
// can be found in arch/x86/kernel/fpu/signal.c:check_xstate_in_sigframe.
|
|
static void prep_fpstate_for_sigframe(void *buf, uint32_t user_size,
|
|
bool use_xsave) {
|
|
struct __fpstate *fpstate = buf;
|
|
struct __fpx_sw_bytes *sw_bytes = &fpstate->sw_reserved;
|
|
|
|
sw_bytes->magic1 = FP_XSTATE_MAGIC1;
|
|
sw_bytes->extended_size = user_size + FP_XSTATE_MAGIC2_SIZE;
|
|
sw_bytes->xfeatures = ~(0ULL) ^ (XCR0_DISABLED_MASK);
|
|
sw_bytes->xstate_size = user_size;
|
|
*(uint32_t *)(buf + user_size) = use_xsave ? FP_XSTATE_MAGIC2 : 0;
|
|
}
|