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* Support the wasm SIMD proposal with native asm lowering (arm64/amd64) One revision spanning the SIMD (0xfd v128) proposal end to end: SSA representation, lowering, scalar reference helpers, and a gcasm asm backend that turns the hot paths into native SIMD — measured on a full llama.cpp build transpiled to pure Go, which this makes run at V8-class speed (prompt eval beats V8 on arm64). Frontend and SSA: - v128 values are [2]uint64 pairs in little-endian lane order; pure ops lower to CSE-able helper calls, memory ops keep statement order, v128.const/shuffle ride as [2]uint64 aux. The full scalar helper set is the reference semantics (saturation, NaN propagation, round-to-even, swizzle OOB, shift masking). - Exception handling lowers to plain branches instead of panic/recover — a check-and-branch after each may-raise call, a per-try dispatch block running the catch-clause chain — covering the C++-shaped patterns (multi-clause catch, delegate targets, rethrow depths) without runtime unwinding, so EH bodies stay eligible for the asm backend. This replaces the closure/recover lowering that #39 extended; its tests are retained unchanged. - Giant functions outline into tractable units (whole loops included, packed u64 boundaries for v128 values), keeping gc compile times and register pressure sane on llama.cpp-sized modules. gcasm backend: - SIMD helper calls splice inline as native NEON/SSE instead of marshalled calls; v128 SSA values travel register-to-register in pair form. Call-tree windows fuse into single splices with region invariant hoisting, bounds-check coalescing, store sinks and scalar-chain internalization; whole countdown loops fuse with an in-splice unroll lane. - Superinstruction selection inside fused regions: 8-bit dot patterns (SMULL+SADALP), SDOT for full 16-byte dots, FMUL by element, scale-lookup addressing, inlined integer division, the software fp32->fp16 idiom lowered to FCVT (both the table-gather and the packed store form), and ggml q8_0 row/column pairing via the traits nrows patch with an SMMLA 2x2 tile kernel. - Runtime CPU-feature dispatch gates spliced bodies (dotprod on arm64, x86-64-v2 SSE on amd64); WASM2GO_FAST_MATH opts into raw-SDOT/FMLA/dual-accumulator forms that trade wasm bit-exactness for native-build-style rounding, validated by token-level equivalence against native llama.cpp. - Guard-page linear memory eliminates per-access bounds checks; jump tables replace the compare tree for br_table. Tooling and CI: - WASM2GO_F16_TABLE asserts the address of ggml's runtime-built f16 table; the transpiler warns when the asserted address matches no gather site (the address moves with every data-layout shift, and a stale assertion silently costs ~7% decode throughput). - The coverage gate runs with -count=1: a cached package result merges incomplete coverage data into the -coverpkg profile, deflating the total by 10+ points depending on what the runner's restored cache contained — the gate must never consume cached results. - Coverage threshold moves to 83% for the enlarged tree; transpile output is deterministic and outline rejections are explained in the build log. Co-Authored-By: Claude Fable 5 <[email protected]> * Replace environment-variable switches with typed Options; drop debug code Configuration now flows through one channel: transpile.Options gains OutlineMinValues, SIMDUnroll, FuseLoops, FuseLoopUnroll, F16TableAddr and FastMath (with matching CLI flags), the gcasm backend receives them as a Config threaded through ModuleOffsets, and no code path branches on an environment variable anymore. Integrator entry points (the wasmify protoc plugin, the CLI) convert their external configuration into these options exactly once. Deleted outright, per the no-env rule and because they were diagnostics rather than build modes: - every WASM2GO_NO_* kill switch and bisection knob (SSA pass disabling, fallback ranges, fuse-window caps, outline limits, inliner windows) — git history keeps them for the next hunt; - every env-gated debug printer (fuse/inline/outline/nrc2/f16/SSA dumps and the near-miss tracers) and the capture-tree keepers; - the dormant multi-exit loop structuring (opt-in, measured slower) and the SSA f32->f16 rewrite entry superseded by the gcasm peephole (its shared idiom matchers stay for the f16 store pass); - the runtime WASM2GO_CPU_PORTABLE override in the generated CPU feature probes. The nil-offsets error paths exposed by the threading get nil-safe Config accessors, and the outline share/v128-min/inliner caps become plain constants at their measured production values. Behavior under default options is unchanged: transpiled output for the non-SIMD and EH fixtures is byte-identical to the previous commit, and the only SIMD-bundle difference is the removed env check in the emitted cpufeat runtime files. Co-Authored-By: Claude Fable 5 <[email protected]> --------- Co-authored-by: Claude Fable 5 <[email protected]>
45 lines
1.4 KiB
Go
45 lines
1.4 KiB
Go
package helpers
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import (
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"math"
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"testing"
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)
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// TestF32ToF16Bits pins the conversion against known IEEE binary16
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// encodings, including round-to-nearest-even ties, denormals,
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// overflow to infinity and the sign|0x7E00 NaN convention. Every
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// non-NaN case must also match hardware FCVT (the asm backend
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// replaces this helper with the native instruction).
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func TestF32ToF16Bits(t *testing.T) {
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cases := []struct {
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in float32
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want int32
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}{
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{0, 0x0000},
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{float32(math.Copysign(0, -1)), 0x8000},
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{1, 0x3C00},
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{-2.5, 0xC100},
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{65504, 0x7BFF}, // max finite half
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{65520, 0x7C00}, // rounds to +inf
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{-65520, 0xFC00}, // rounds to -inf
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{float32(math.Inf(1)), 0x7C00},
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{float32(math.Inf(-1)), 0xFC00},
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{float32(math.NaN()), 0x7E00},
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{5.9604645e-08, 0x0001}, // smallest denormal half
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{6.097555e-05, 0x03FF}, // largest denormal half
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{6.104e-05, 0x0400}, // smallest normal half
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{0.099975586, 0x2E66}, // 0.1 truncated to a half boundary
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{1.0009766, 0x3C01}, // one ulp above 1
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{1.0004883, 0x3C00}, // tie: rounds to even (down)
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{1.0014648, 0x3C02}, // tie: rounds to even (up)
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}
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for _, c := range cases {
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if got := f32_to_f16_bits(c.in); got != c.want {
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t.Errorf("f32_to_f16_bits(%v) = %#04x, want %#04x", c.in, got, c.want)
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}
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}
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if got := f32_to_f16_bits(float32(math.Float32frombits(0xFFC00001))); got != int32(0xFE00) {
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t.Errorf("negative NaN = %#04x, want 0xFE00", got)
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}
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}
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