mirror of
https://github.com/hanzoai/wasm2go.git
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f30ec292fd
* Support the wasm SIMD proposal with native asm lowering (arm64/amd64) One revision spanning the SIMD (0xfd v128) proposal end to end: SSA representation, lowering, scalar reference helpers, and a gcasm asm backend that turns the hot paths into native SIMD — measured on a full llama.cpp build transpiled to pure Go, which this makes run at V8-class speed (prompt eval beats V8 on arm64). Frontend and SSA: - v128 values are [2]uint64 pairs in little-endian lane order; pure ops lower to CSE-able helper calls, memory ops keep statement order, v128.const/shuffle ride as [2]uint64 aux. The full scalar helper set is the reference semantics (saturation, NaN propagation, round-to-even, swizzle OOB, shift masking). - Exception handling lowers to plain branches instead of panic/recover — a check-and-branch after each may-raise call, a per-try dispatch block running the catch-clause chain — covering the C++-shaped patterns (multi-clause catch, delegate targets, rethrow depths) without runtime unwinding, so EH bodies stay eligible for the asm backend. This replaces the closure/recover lowering that #39 extended; its tests are retained unchanged. - Giant functions outline into tractable units (whole loops included, packed u64 boundaries for v128 values), keeping gc compile times and register pressure sane on llama.cpp-sized modules. gcasm backend: - SIMD helper calls splice inline as native NEON/SSE instead of marshalled calls; v128 SSA values travel register-to-register in pair form. Call-tree windows fuse into single splices with region invariant hoisting, bounds-check coalescing, store sinks and scalar-chain internalization; whole countdown loops fuse with an in-splice unroll lane. - Superinstruction selection inside fused regions: 8-bit dot patterns (SMULL+SADALP), SDOT for full 16-byte dots, FMUL by element, scale-lookup addressing, inlined integer division, the software fp32->fp16 idiom lowered to FCVT (both the table-gather and the packed store form), and ggml q8_0 row/column pairing via the traits nrows patch with an SMMLA 2x2 tile kernel. - Runtime CPU-feature dispatch gates spliced bodies (dotprod on arm64, x86-64-v2 SSE on amd64); WASM2GO_FAST_MATH opts into raw-SDOT/FMLA/dual-accumulator forms that trade wasm bit-exactness for native-build-style rounding, validated by token-level equivalence against native llama.cpp. - Guard-page linear memory eliminates per-access bounds checks; jump tables replace the compare tree for br_table. Tooling and CI: - WASM2GO_F16_TABLE asserts the address of ggml's runtime-built f16 table; the transpiler warns when the asserted address matches no gather site (the address moves with every data-layout shift, and a stale assertion silently costs ~7% decode throughput). - The coverage gate runs with -count=1: a cached package result merges incomplete coverage data into the -coverpkg profile, deflating the total by 10+ points depending on what the runner's restored cache contained — the gate must never consume cached results. - Coverage threshold moves to 83% for the enlarged tree; transpile output is deterministic and outline rejections are explained in the build log. Co-Authored-By: Claude Fable 5 <[email protected]> * Replace environment-variable switches with typed Options; drop debug code Configuration now flows through one channel: transpile.Options gains OutlineMinValues, SIMDUnroll, FuseLoops, FuseLoopUnroll, F16TableAddr and FastMath (with matching CLI flags), the gcasm backend receives them as a Config threaded through ModuleOffsets, and no code path branches on an environment variable anymore. Integrator entry points (the wasmify protoc plugin, the CLI) convert their external configuration into these options exactly once. Deleted outright, per the no-env rule and because they were diagnostics rather than build modes: - every WASM2GO_NO_* kill switch and bisection knob (SSA pass disabling, fallback ranges, fuse-window caps, outline limits, inliner windows) — git history keeps them for the next hunt; - every env-gated debug printer (fuse/inline/outline/nrc2/f16/SSA dumps and the near-miss tracers) and the capture-tree keepers; - the dormant multi-exit loop structuring (opt-in, measured slower) and the SSA f32->f16 rewrite entry superseded by the gcasm peephole (its shared idiom matchers stay for the f16 store pass); - the runtime WASM2GO_CPU_PORTABLE override in the generated CPU feature probes. The nil-offsets error paths exposed by the threading get nil-safe Config accessors, and the outline share/v128-min/inliner caps become plain constants at their measured production values. Behavior under default options is unchanged: transpiled output for the non-SIMD and EH fixtures is byte-identical to the previous commit, and the only SIMD-bundle difference is the removed env check in the emitted cpufeat runtime files. Co-Authored-By: Claude Fable 5 <[email protected]> --------- Co-authored-by: Claude Fable 5 <[email protected]>
1234 lines
34 KiB
Go
1234 lines
34 KiB
Go
// Code generated by tools/gen-simd-asm/gen.py; DO NOT EDIT.
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package helpers
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//go:noinline
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func simd_p_f16x4_cvt_bits(a0, a1 uint64) int64 { return simd_f16x4_cvt_bits([2]uint64{a0, a1}) }
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//go:noinline
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func simd_p_f32x4_abs(a0, a1 uint64) (uint64, uint64) {
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r := simd_f32x4_abs([2]uint64{a0, a1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_add(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f32x4_add([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_ceil(a0, a1 uint64) (uint64, uint64) {
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r := simd_f32x4_ceil([2]uint64{a0, a1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_convert_i32x4_s(a0, a1 uint64) (uint64, uint64) {
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r := simd_f32x4_convert_i32x4_s([2]uint64{a0, a1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_convert_i32x4_u(a0, a1 uint64) (uint64, uint64) {
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r := simd_f32x4_convert_i32x4_u([2]uint64{a0, a1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_demote_f64x2_zero(a0, a1 uint64) (uint64, uint64) {
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r := simd_f32x4_demote_f64x2_zero([2]uint64{a0, a1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_div(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f32x4_div([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_eq(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f32x4_eq([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_extract_lane(v0, v1 uint64, lane int32) float32 { return simd_f32x4_extract_lane([2]uint64{v0, v1}, lane) }
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//go:noinline
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func simd_p_f32x4_floor(a0, a1 uint64) (uint64, uint64) {
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r := simd_f32x4_floor([2]uint64{a0, a1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_ge(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f32x4_ge([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_gt(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f32x4_gt([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_le(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f32x4_le([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_lt(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f32x4_lt([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_max(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f32x4_max([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_min(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f32x4_min([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_mul(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f32x4_mul([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_ne(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f32x4_ne([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_nearest(a0, a1 uint64) (uint64, uint64) {
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r := simd_f32x4_nearest([2]uint64{a0, a1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_neg(a0, a1 uint64) (uint64, uint64) {
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r := simd_f32x4_neg([2]uint64{a0, a1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_pmax(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f32x4_pmax([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_pmin(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f32x4_pmin([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_replace_lane(v0, v1 uint64, lane int32, x float32) (uint64, uint64) {
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r := simd_f32x4_replace_lane([2]uint64{v0, v1}, lane, x)
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_splat(x float32) (uint64, uint64) {
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r := simd_f32x4_splat(x)
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_sqrt(a0, a1 uint64) (uint64, uint64) {
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r := simd_f32x4_sqrt([2]uint64{a0, a1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_sub(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f32x4_sub([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f32x4_trunc(a0, a1 uint64) (uint64, uint64) {
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r := simd_f32x4_trunc([2]uint64{a0, a1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_abs(a0, a1 uint64) (uint64, uint64) {
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r := simd_f64x2_abs([2]uint64{a0, a1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_add(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f64x2_add([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_ceil(a0, a1 uint64) (uint64, uint64) {
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r := simd_f64x2_ceil([2]uint64{a0, a1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_convert_low_i32x4_s(a0, a1 uint64) (uint64, uint64) {
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r := simd_f64x2_convert_low_i32x4_s([2]uint64{a0, a1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_convert_low_i32x4_u(a0, a1 uint64) (uint64, uint64) {
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r := simd_f64x2_convert_low_i32x4_u([2]uint64{a0, a1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_div(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f64x2_div([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_eq(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f64x2_eq([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_extract_lane(v0, v1 uint64, lane int32) float64 { return simd_f64x2_extract_lane([2]uint64{v0, v1}, lane) }
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//go:noinline
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func simd_p_f64x2_floor(a0, a1 uint64) (uint64, uint64) {
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r := simd_f64x2_floor([2]uint64{a0, a1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_ge(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f64x2_ge([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_gt(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f64x2_gt([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_le(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f64x2_le([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_lt(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f64x2_lt([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_max(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f64x2_max([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_min(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f64x2_min([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_mul(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f64x2_mul([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_ne(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f64x2_ne([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_nearest(a0, a1 uint64) (uint64, uint64) {
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r := simd_f64x2_nearest([2]uint64{a0, a1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_neg(a0, a1 uint64) (uint64, uint64) {
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r := simd_f64x2_neg([2]uint64{a0, a1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_pmax(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f64x2_pmax([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_pmin(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f64x2_pmin([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_promote_low_f32x4(a0, a1 uint64) (uint64, uint64) {
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r := simd_f64x2_promote_low_f32x4([2]uint64{a0, a1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_replace_lane(v0, v1 uint64, lane int32, x float64) (uint64, uint64) {
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r := simd_f64x2_replace_lane([2]uint64{v0, v1}, lane, x)
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_splat(x float64) (uint64, uint64) {
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r := simd_f64x2_splat(x)
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_sqrt(a0, a1 uint64) (uint64, uint64) {
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r := simd_f64x2_sqrt([2]uint64{a0, a1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_sub(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
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r := simd_f64x2_sub([2]uint64{a0, a1}, [2]uint64{b0, b1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_f64x2_trunc(a0, a1 uint64) (uint64, uint64) {
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r := simd_f64x2_trunc([2]uint64{a0, a1})
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return r[0], r[1]
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}
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//go:noinline
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func simd_p_i16x8_abs(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_abs([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_add(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_add([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_add_sat_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_add_sat_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_add_sat_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_add_sat_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_all_true(a0, a1 uint64) int32 { return simd_i16x8_all_true([2]uint64{a0, a1}) }
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_avgr_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_avgr_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_bitmask(a0, a1 uint64) int32 { return simd_i16x8_bitmask([2]uint64{a0, a1}) }
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_eq(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_eq([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_extadd_pairwise_i8x16_s(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_extadd_pairwise_i8x16_s([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_extadd_pairwise_i8x16_u(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_extadd_pairwise_i8x16_u([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_extend_high_i8x16_s(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_extend_high_i8x16_s([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_extend_high_i8x16_u(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_extend_high_i8x16_u([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_extend_low_i8x16_s(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_extend_low_i8x16_s([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_extend_low_i8x16_u(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_extend_low_i8x16_u([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_extmul_high_i8x16_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_extmul_high_i8x16_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_extmul_high_i8x16_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_extmul_high_i8x16_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_extmul_low_i8x16_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_extmul_low_i8x16_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_extmul_low_i8x16_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_extmul_low_i8x16_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_extract_lane_s(v0, v1 uint64, lane int32) int32 { return simd_i16x8_extract_lane_s([2]uint64{v0, v1}, lane) }
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_extract_lane_u(v0, v1 uint64, lane int32) int32 { return simd_i16x8_extract_lane_u([2]uint64{v0, v1}, lane) }
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_ge_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_ge_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_ge_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_ge_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_gt_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_gt_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_gt_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_gt_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_le_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_le_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_le_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_le_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_lt_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_lt_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_lt_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_lt_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_max_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_max_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_max_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_max_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_min_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_min_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_min_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_min_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_mul(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_mul([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_narrow_i32x4_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_narrow_i32x4_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_narrow_i32x4_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_narrow_i32x4_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_ne(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_ne([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_neg(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_neg([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_q15mulr_sat_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_q15mulr_sat_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_replace_lane(v0, v1 uint64, lane int32, x int32) (uint64, uint64) {
|
|
r := simd_i16x8_replace_lane([2]uint64{v0, v1}, lane, x)
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_shl(a0, a1 uint64, s int32) (uint64, uint64) {
|
|
r := simd_i16x8_shl([2]uint64{a0, a1}, s)
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_shr_s(a0, a1 uint64, s int32) (uint64, uint64) {
|
|
r := simd_i16x8_shr_s([2]uint64{a0, a1}, s)
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_shr_u(a0, a1 uint64, s int32) (uint64, uint64) {
|
|
r := simd_i16x8_shr_u([2]uint64{a0, a1}, s)
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_splat(x int32) (uint64, uint64) {
|
|
r := simd_i16x8_splat(x)
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_sub(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_sub([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_sub_sat_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_sub_sat_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i16x8_sub_sat_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i16x8_sub_sat_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_abs(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_abs([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_add(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_add([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_all_true(a0, a1 uint64) int32 { return simd_i32x4_all_true([2]uint64{a0, a1}) }
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_bitmask(a0, a1 uint64) int32 { return simd_i32x4_bitmask([2]uint64{a0, a1}) }
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_dot_i16x8_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_dot_i16x8_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_eq(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_eq([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_extadd_pairwise_i16x8_s(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_extadd_pairwise_i16x8_s([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_extadd_pairwise_i16x8_u(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_extadd_pairwise_i16x8_u([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_extend_high_i16x8_s(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_extend_high_i16x8_s([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_extend_high_i16x8_u(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_extend_high_i16x8_u([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_extend_low_i16x8_s(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_extend_low_i16x8_s([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_extend_low_i16x8_u(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_extend_low_i16x8_u([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_extmul_high_i16x8_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_extmul_high_i16x8_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_extmul_high_i16x8_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_extmul_high_i16x8_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_extmul_low_i16x8_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_extmul_low_i16x8_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_extmul_low_i16x8_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_extmul_low_i16x8_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_extract_lane(v0, v1 uint64, lane int32) int32 { return simd_i32x4_extract_lane([2]uint64{v0, v1}, lane) }
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_ge_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_ge_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_ge_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_ge_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_gt_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_gt_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_gt_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_gt_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_le_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_le_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_le_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_le_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_lt_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_lt_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_lt_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_lt_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_max_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_max_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_max_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_max_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_min_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_min_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_min_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_min_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_mul(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_mul([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_ne(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_ne([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_neg(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_neg([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_replace_lane(v0, v1 uint64, lane int32, x int32) (uint64, uint64) {
|
|
r := simd_i32x4_replace_lane([2]uint64{v0, v1}, lane, x)
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_shl(a0, a1 uint64, s int32) (uint64, uint64) {
|
|
r := simd_i32x4_shl([2]uint64{a0, a1}, s)
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_shr_s(a0, a1 uint64, s int32) (uint64, uint64) {
|
|
r := simd_i32x4_shr_s([2]uint64{a0, a1}, s)
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_shr_u(a0, a1 uint64, s int32) (uint64, uint64) {
|
|
r := simd_i32x4_shr_u([2]uint64{a0, a1}, s)
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_splat(x int32) (uint64, uint64) {
|
|
r := simd_i32x4_splat(x)
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_sub(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_sub([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_trunc_sat_f32x4_s(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_trunc_sat_f32x4_s([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_trunc_sat_f32x4_u(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_trunc_sat_f32x4_u([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_trunc_sat_f64x2_s_zero(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_trunc_sat_f64x2_s_zero([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i32x4_trunc_sat_f64x2_u_zero(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i32x4_trunc_sat_f64x2_u_zero([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_abs(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i64x2_abs([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_add(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i64x2_add([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_all_true(a0, a1 uint64) int32 { return simd_i64x2_all_true([2]uint64{a0, a1}) }
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_bitmask(a0, a1 uint64) int32 { return simd_i64x2_bitmask([2]uint64{a0, a1}) }
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_eq(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i64x2_eq([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_extend_high_i32x4_s(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i64x2_extend_high_i32x4_s([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_extend_high_i32x4_u(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i64x2_extend_high_i32x4_u([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_extend_low_i32x4_s(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i64x2_extend_low_i32x4_s([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_extend_low_i32x4_u(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i64x2_extend_low_i32x4_u([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_extmul_high_i32x4_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i64x2_extmul_high_i32x4_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_extmul_high_i32x4_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i64x2_extmul_high_i32x4_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_extmul_low_i32x4_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i64x2_extmul_low_i32x4_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_extmul_low_i32x4_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i64x2_extmul_low_i32x4_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_extract_lane(v0, v1 uint64, lane int32) int64 { return simd_i64x2_extract_lane([2]uint64{v0, v1}, lane) }
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_ge_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i64x2_ge_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_gt_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i64x2_gt_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_le_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i64x2_le_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_lt_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i64x2_lt_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_mul(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i64x2_mul([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_ne(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i64x2_ne([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_neg(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i64x2_neg([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_replace_lane(v0, v1 uint64, lane int32, x int64) (uint64, uint64) {
|
|
r := simd_i64x2_replace_lane([2]uint64{v0, v1}, lane, x)
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_shl(a0, a1 uint64, s int32) (uint64, uint64) {
|
|
r := simd_i64x2_shl([2]uint64{a0, a1}, s)
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_shr_s(a0, a1 uint64, s int32) (uint64, uint64) {
|
|
r := simd_i64x2_shr_s([2]uint64{a0, a1}, s)
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_shr_u(a0, a1 uint64, s int32) (uint64, uint64) {
|
|
r := simd_i64x2_shr_u([2]uint64{a0, a1}, s)
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_splat(x int64) (uint64, uint64) {
|
|
r := simd_i64x2_splat(x)
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i64x2_sub(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i64x2_sub([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_abs(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_abs([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_add(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_add([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_add_sat_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_add_sat_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_add_sat_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_add_sat_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_all_true(a0, a1 uint64) int32 { return simd_i8x16_all_true([2]uint64{a0, a1}) }
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_avgr_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_avgr_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_bitmask(a0, a1 uint64) int32 { return simd_i8x16_bitmask([2]uint64{a0, a1}) }
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_eq(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_eq([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_extract_lane_s(v0, v1 uint64, lane int32) int32 { return simd_i8x16_extract_lane_s([2]uint64{v0, v1}, lane) }
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_extract_lane_u(v0, v1 uint64, lane int32) int32 { return simd_i8x16_extract_lane_u([2]uint64{v0, v1}, lane) }
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_ge_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_ge_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_ge_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_ge_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_gt_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_gt_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_gt_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_gt_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_le_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_le_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_le_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_le_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_lt_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_lt_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_lt_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_lt_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_max_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_max_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_max_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_max_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_min_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_min_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_min_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_min_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_narrow_i16x8_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_narrow_i16x8_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_narrow_i16x8_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_narrow_i16x8_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_ne(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_ne([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_neg(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_neg([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_popcnt(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_popcnt([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_replace_lane(v0, v1 uint64, lane int32, x int32) (uint64, uint64) {
|
|
r := simd_i8x16_replace_lane([2]uint64{v0, v1}, lane, x)
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_shl(a0, a1 uint64, s int32) (uint64, uint64) {
|
|
r := simd_i8x16_shl([2]uint64{a0, a1}, s)
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_shr_s(a0, a1 uint64, s int32) (uint64, uint64) {
|
|
r := simd_i8x16_shr_s([2]uint64{a0, a1}, s)
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_shr_u(a0, a1 uint64, s int32) (uint64, uint64) {
|
|
r := simd_i8x16_shr_u([2]uint64{a0, a1}, s)
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_shuffle(a0, a1 uint64, b0, b1 uint64, pat0, pat1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_shuffle([2]uint64{a0, a1}, [2]uint64{b0, b1}, [2]uint64{pat0, pat1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_splat(x int32) (uint64, uint64) {
|
|
r := simd_i8x16_splat(x)
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_sub(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_sub([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_sub_sat_s(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_sub_sat_s([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_sub_sat_u(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_sub_sat_u([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_i8x16_swizzle(a0, a1 uint64, s0, s1 uint64) (uint64, uint64) {
|
|
r := simd_i8x16_swizzle([2]uint64{a0, a1}, [2]uint64{s0, s1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_v128_and(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_v128_and([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_v128_andnot(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_v128_andnot([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_v128_any_true(a0, a1 uint64) int32 { return simd_v128_any_true([2]uint64{a0, a1}) }
|
|
|
|
//go:noinline
|
|
func simd_p_v128_bitselect(a0, a1 uint64, b0, b1 uint64, c0, c1 uint64) (uint64, uint64) {
|
|
r := simd_v128_bitselect([2]uint64{a0, a1}, [2]uint64{b0, b1}, [2]uint64{c0, c1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_v128_not(a0, a1 uint64) (uint64, uint64) {
|
|
r := simd_v128_not([2]uint64{a0, a1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_v128_or(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_v128_or([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|
|
|
|
//go:noinline
|
|
func simd_p_v128_xor(a0, a1 uint64, b0, b1 uint64) (uint64, uint64) {
|
|
r := simd_v128_xor([2]uint64{a0, a1}, [2]uint64{b0, b1})
|
|
return r[0], r[1]
|
|
}
|