mirror of
https://github.com/hanzoai/wasm2go.git
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f30ec292fd
* Support the wasm SIMD proposal with native asm lowering (arm64/amd64) One revision spanning the SIMD (0xfd v128) proposal end to end: SSA representation, lowering, scalar reference helpers, and a gcasm asm backend that turns the hot paths into native SIMD — measured on a full llama.cpp build transpiled to pure Go, which this makes run at V8-class speed (prompt eval beats V8 on arm64). Frontend and SSA: - v128 values are [2]uint64 pairs in little-endian lane order; pure ops lower to CSE-able helper calls, memory ops keep statement order, v128.const/shuffle ride as [2]uint64 aux. The full scalar helper set is the reference semantics (saturation, NaN propagation, round-to-even, swizzle OOB, shift masking). - Exception handling lowers to plain branches instead of panic/recover — a check-and-branch after each may-raise call, a per-try dispatch block running the catch-clause chain — covering the C++-shaped patterns (multi-clause catch, delegate targets, rethrow depths) without runtime unwinding, so EH bodies stay eligible for the asm backend. This replaces the closure/recover lowering that #39 extended; its tests are retained unchanged. - Giant functions outline into tractable units (whole loops included, packed u64 boundaries for v128 values), keeping gc compile times and register pressure sane on llama.cpp-sized modules. gcasm backend: - SIMD helper calls splice inline as native NEON/SSE instead of marshalled calls; v128 SSA values travel register-to-register in pair form. Call-tree windows fuse into single splices with region invariant hoisting, bounds-check coalescing, store sinks and scalar-chain internalization; whole countdown loops fuse with an in-splice unroll lane. - Superinstruction selection inside fused regions: 8-bit dot patterns (SMULL+SADALP), SDOT for full 16-byte dots, FMUL by element, scale-lookup addressing, inlined integer division, the software fp32->fp16 idiom lowered to FCVT (both the table-gather and the packed store form), and ggml q8_0 row/column pairing via the traits nrows patch with an SMMLA 2x2 tile kernel. - Runtime CPU-feature dispatch gates spliced bodies (dotprod on arm64, x86-64-v2 SSE on amd64); WASM2GO_FAST_MATH opts into raw-SDOT/FMLA/dual-accumulator forms that trade wasm bit-exactness for native-build-style rounding, validated by token-level equivalence against native llama.cpp. - Guard-page linear memory eliminates per-access bounds checks; jump tables replace the compare tree for br_table. Tooling and CI: - WASM2GO_F16_TABLE asserts the address of ggml's runtime-built f16 table; the transpiler warns when the asserted address matches no gather site (the address moves with every data-layout shift, and a stale assertion silently costs ~7% decode throughput). - The coverage gate runs with -count=1: a cached package result merges incomplete coverage data into the -coverpkg profile, deflating the total by 10+ points depending on what the runner's restored cache contained — the gate must never consume cached results. - Coverage threshold moves to 83% for the enlarged tree; transpile output is deterministic and outline rejections are explained in the build log. Co-Authored-By: Claude Fable 5 <[email protected]> * Replace environment-variable switches with typed Options; drop debug code Configuration now flows through one channel: transpile.Options gains OutlineMinValues, SIMDUnroll, FuseLoops, FuseLoopUnroll, F16TableAddr and FastMath (with matching CLI flags), the gcasm backend receives them as a Config threaded through ModuleOffsets, and no code path branches on an environment variable anymore. Integrator entry points (the wasmify protoc plugin, the CLI) convert their external configuration into these options exactly once. Deleted outright, per the no-env rule and because they were diagnostics rather than build modes: - every WASM2GO_NO_* kill switch and bisection knob (SSA pass disabling, fallback ranges, fuse-window caps, outline limits, inliner windows) — git history keeps them for the next hunt; - every env-gated debug printer (fuse/inline/outline/nrc2/f16/SSA dumps and the near-miss tracers) and the capture-tree keepers; - the dormant multi-exit loop structuring (opt-in, measured slower) and the SSA f32->f16 rewrite entry superseded by the gcasm peephole (its shared idiom matchers stay for the f16 store pass); - the runtime WASM2GO_CPU_PORTABLE override in the generated CPU feature probes. The nil-offsets error paths exposed by the threading get nil-safe Config accessors, and the outline share/v128-min/inliner caps become plain constants at their measured production values. Behavior under default options is unchanged: transpiled output for the non-SIMD and EH fixtures is byte-identical to the previous commit, and the only SIMD-bundle difference is the removed env check in the emitted cpufeat runtime files. Co-Authored-By: Claude Fable 5 <[email protected]> --------- Co-authored-by: Claude Fable 5 <[email protected]>
662 lines
32 KiB
Go
662 lines
32 KiB
Go
// Code generated by tools/gen-simd-asm/gen.py; DO NOT EDIT.
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package helpers
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import (
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"math"
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"testing"
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)
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var _ = math.Float32bits
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var simdPairCorpus = [][2]uint64{
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{0, 0},
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{^uint64(0), ^uint64(0)},
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{0x8000000080000000, 0x7fc00000ff800001},
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{0x0102030405060708, 0x090a0b0c0d0e0f10},
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{0x7fff7fff7fff7fff, 0x8080808080808080},
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}
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func TestSimdPairWrappers(t *testing.T) {
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for _, a := range simdPairCorpus {
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for _, b := range simdPairCorpus {
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if l, h := simd_p_f32x4_add(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f32x4_add(a, b) {
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t.Fatalf("simd_p_f32x4_add(%x, %x)", a, b)
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}
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if l, h := simd_p_f32x4_div(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f32x4_div(a, b) {
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t.Fatalf("simd_p_f32x4_div(%x, %x)", a, b)
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}
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if l, h := simd_p_f32x4_eq(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f32x4_eq(a, b) {
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t.Fatalf("simd_p_f32x4_eq(%x, %x)", a, b)
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}
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if l, h := simd_p_f32x4_ge(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f32x4_ge(a, b) {
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t.Fatalf("simd_p_f32x4_ge(%x, %x)", a, b)
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}
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if l, h := simd_p_f32x4_gt(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f32x4_gt(a, b) {
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t.Fatalf("simd_p_f32x4_gt(%x, %x)", a, b)
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}
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if l, h := simd_p_f32x4_le(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f32x4_le(a, b) {
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t.Fatalf("simd_p_f32x4_le(%x, %x)", a, b)
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}
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if l, h := simd_p_f32x4_lt(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f32x4_lt(a, b) {
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t.Fatalf("simd_p_f32x4_lt(%x, %x)", a, b)
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}
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if l, h := simd_p_f32x4_max(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f32x4_max(a, b) {
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t.Fatalf("simd_p_f32x4_max(%x, %x)", a, b)
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}
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if l, h := simd_p_f32x4_min(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f32x4_min(a, b) {
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t.Fatalf("simd_p_f32x4_min(%x, %x)", a, b)
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}
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if l, h := simd_p_f32x4_mul(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f32x4_mul(a, b) {
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t.Fatalf("simd_p_f32x4_mul(%x, %x)", a, b)
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}
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if l, h := simd_p_f32x4_ne(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f32x4_ne(a, b) {
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t.Fatalf("simd_p_f32x4_ne(%x, %x)", a, b)
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}
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if l, h := simd_p_f32x4_pmax(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f32x4_pmax(a, b) {
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t.Fatalf("simd_p_f32x4_pmax(%x, %x)", a, b)
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}
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if l, h := simd_p_f32x4_pmin(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f32x4_pmin(a, b) {
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t.Fatalf("simd_p_f32x4_pmin(%x, %x)", a, b)
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}
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if l, h := simd_p_f32x4_sub(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f32x4_sub(a, b) {
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t.Fatalf("simd_p_f32x4_sub(%x, %x)", a, b)
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}
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if l, h := simd_p_f64x2_add(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f64x2_add(a, b) {
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t.Fatalf("simd_p_f64x2_add(%x, %x)", a, b)
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}
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if l, h := simd_p_f64x2_div(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f64x2_div(a, b) {
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t.Fatalf("simd_p_f64x2_div(%x, %x)", a, b)
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}
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if l, h := simd_p_f64x2_eq(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f64x2_eq(a, b) {
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t.Fatalf("simd_p_f64x2_eq(%x, %x)", a, b)
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}
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if l, h := simd_p_f64x2_ge(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f64x2_ge(a, b) {
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t.Fatalf("simd_p_f64x2_ge(%x, %x)", a, b)
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}
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if l, h := simd_p_f64x2_gt(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f64x2_gt(a, b) {
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t.Fatalf("simd_p_f64x2_gt(%x, %x)", a, b)
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}
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if l, h := simd_p_f64x2_le(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f64x2_le(a, b) {
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t.Fatalf("simd_p_f64x2_le(%x, %x)", a, b)
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}
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if l, h := simd_p_f64x2_lt(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f64x2_lt(a, b) {
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t.Fatalf("simd_p_f64x2_lt(%x, %x)", a, b)
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}
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if l, h := simd_p_f64x2_max(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f64x2_max(a, b) {
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t.Fatalf("simd_p_f64x2_max(%x, %x)", a, b)
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}
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if l, h := simd_p_f64x2_min(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f64x2_min(a, b) {
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t.Fatalf("simd_p_f64x2_min(%x, %x)", a, b)
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}
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if l, h := simd_p_f64x2_mul(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f64x2_mul(a, b) {
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t.Fatalf("simd_p_f64x2_mul(%x, %x)", a, b)
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}
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if l, h := simd_p_f64x2_ne(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f64x2_ne(a, b) {
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t.Fatalf("simd_p_f64x2_ne(%x, %x)", a, b)
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}
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if l, h := simd_p_f64x2_pmax(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f64x2_pmax(a, b) {
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t.Fatalf("simd_p_f64x2_pmax(%x, %x)", a, b)
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}
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if l, h := simd_p_f64x2_pmin(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f64x2_pmin(a, b) {
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t.Fatalf("simd_p_f64x2_pmin(%x, %x)", a, b)
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}
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if l, h := simd_p_f64x2_sub(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_f64x2_sub(a, b) {
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t.Fatalf("simd_p_f64x2_sub(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_add(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_add(a, b) {
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t.Fatalf("simd_p_i16x8_add(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_add_sat_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_add_sat_s(a, b) {
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t.Fatalf("simd_p_i16x8_add_sat_s(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_add_sat_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_add_sat_u(a, b) {
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t.Fatalf("simd_p_i16x8_add_sat_u(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_avgr_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_avgr_u(a, b) {
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t.Fatalf("simd_p_i16x8_avgr_u(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_eq(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_eq(a, b) {
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t.Fatalf("simd_p_i16x8_eq(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_extmul_high_i8x16_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_extmul_high_i8x16_s(a, b) {
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t.Fatalf("simd_p_i16x8_extmul_high_i8x16_s(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_extmul_high_i8x16_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_extmul_high_i8x16_u(a, b) {
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t.Fatalf("simd_p_i16x8_extmul_high_i8x16_u(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_extmul_low_i8x16_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_extmul_low_i8x16_s(a, b) {
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t.Fatalf("simd_p_i16x8_extmul_low_i8x16_s(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_extmul_low_i8x16_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_extmul_low_i8x16_u(a, b) {
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t.Fatalf("simd_p_i16x8_extmul_low_i8x16_u(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_ge_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_ge_s(a, b) {
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t.Fatalf("simd_p_i16x8_ge_s(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_ge_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_ge_u(a, b) {
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t.Fatalf("simd_p_i16x8_ge_u(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_gt_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_gt_s(a, b) {
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t.Fatalf("simd_p_i16x8_gt_s(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_gt_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_gt_u(a, b) {
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t.Fatalf("simd_p_i16x8_gt_u(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_le_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_le_s(a, b) {
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t.Fatalf("simd_p_i16x8_le_s(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_le_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_le_u(a, b) {
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t.Fatalf("simd_p_i16x8_le_u(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_lt_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_lt_s(a, b) {
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t.Fatalf("simd_p_i16x8_lt_s(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_lt_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_lt_u(a, b) {
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t.Fatalf("simd_p_i16x8_lt_u(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_max_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_max_s(a, b) {
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t.Fatalf("simd_p_i16x8_max_s(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_max_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_max_u(a, b) {
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t.Fatalf("simd_p_i16x8_max_u(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_min_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_min_s(a, b) {
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t.Fatalf("simd_p_i16x8_min_s(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_min_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_min_u(a, b) {
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t.Fatalf("simd_p_i16x8_min_u(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_mul(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_mul(a, b) {
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t.Fatalf("simd_p_i16x8_mul(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_narrow_i32x4_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_narrow_i32x4_s(a, b) {
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t.Fatalf("simd_p_i16x8_narrow_i32x4_s(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_narrow_i32x4_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_narrow_i32x4_u(a, b) {
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t.Fatalf("simd_p_i16x8_narrow_i32x4_u(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_ne(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_ne(a, b) {
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t.Fatalf("simd_p_i16x8_ne(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_q15mulr_sat_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_q15mulr_sat_s(a, b) {
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t.Fatalf("simd_p_i16x8_q15mulr_sat_s(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_sub(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_sub(a, b) {
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t.Fatalf("simd_p_i16x8_sub(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_sub_sat_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_sub_sat_s(a, b) {
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t.Fatalf("simd_p_i16x8_sub_sat_s(%x, %x)", a, b)
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}
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if l, h := simd_p_i16x8_sub_sat_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i16x8_sub_sat_u(a, b) {
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|
t.Fatalf("simd_p_i16x8_sub_sat_u(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_add(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_add(a, b) {
|
|
t.Fatalf("simd_p_i32x4_add(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_dot_i16x8_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_dot_i16x8_s(a, b) {
|
|
t.Fatalf("simd_p_i32x4_dot_i16x8_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_eq(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_eq(a, b) {
|
|
t.Fatalf("simd_p_i32x4_eq(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_extmul_high_i16x8_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_extmul_high_i16x8_s(a, b) {
|
|
t.Fatalf("simd_p_i32x4_extmul_high_i16x8_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_extmul_high_i16x8_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_extmul_high_i16x8_u(a, b) {
|
|
t.Fatalf("simd_p_i32x4_extmul_high_i16x8_u(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_extmul_low_i16x8_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_extmul_low_i16x8_s(a, b) {
|
|
t.Fatalf("simd_p_i32x4_extmul_low_i16x8_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_extmul_low_i16x8_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_extmul_low_i16x8_u(a, b) {
|
|
t.Fatalf("simd_p_i32x4_extmul_low_i16x8_u(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_ge_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_ge_s(a, b) {
|
|
t.Fatalf("simd_p_i32x4_ge_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_ge_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_ge_u(a, b) {
|
|
t.Fatalf("simd_p_i32x4_ge_u(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_gt_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_gt_s(a, b) {
|
|
t.Fatalf("simd_p_i32x4_gt_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_gt_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_gt_u(a, b) {
|
|
t.Fatalf("simd_p_i32x4_gt_u(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_le_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_le_s(a, b) {
|
|
t.Fatalf("simd_p_i32x4_le_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_le_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_le_u(a, b) {
|
|
t.Fatalf("simd_p_i32x4_le_u(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_lt_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_lt_s(a, b) {
|
|
t.Fatalf("simd_p_i32x4_lt_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_lt_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_lt_u(a, b) {
|
|
t.Fatalf("simd_p_i32x4_lt_u(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_max_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_max_s(a, b) {
|
|
t.Fatalf("simd_p_i32x4_max_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_max_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_max_u(a, b) {
|
|
t.Fatalf("simd_p_i32x4_max_u(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_min_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_min_s(a, b) {
|
|
t.Fatalf("simd_p_i32x4_min_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_min_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_min_u(a, b) {
|
|
t.Fatalf("simd_p_i32x4_min_u(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_mul(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_mul(a, b) {
|
|
t.Fatalf("simd_p_i32x4_mul(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_ne(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_ne(a, b) {
|
|
t.Fatalf("simd_p_i32x4_ne(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i32x4_sub(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i32x4_sub(a, b) {
|
|
t.Fatalf("simd_p_i32x4_sub(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i64x2_add(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i64x2_add(a, b) {
|
|
t.Fatalf("simd_p_i64x2_add(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i64x2_eq(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i64x2_eq(a, b) {
|
|
t.Fatalf("simd_p_i64x2_eq(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i64x2_extmul_high_i32x4_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i64x2_extmul_high_i32x4_s(a, b) {
|
|
t.Fatalf("simd_p_i64x2_extmul_high_i32x4_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i64x2_extmul_high_i32x4_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i64x2_extmul_high_i32x4_u(a, b) {
|
|
t.Fatalf("simd_p_i64x2_extmul_high_i32x4_u(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i64x2_extmul_low_i32x4_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i64x2_extmul_low_i32x4_s(a, b) {
|
|
t.Fatalf("simd_p_i64x2_extmul_low_i32x4_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i64x2_extmul_low_i32x4_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i64x2_extmul_low_i32x4_u(a, b) {
|
|
t.Fatalf("simd_p_i64x2_extmul_low_i32x4_u(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i64x2_ge_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i64x2_ge_s(a, b) {
|
|
t.Fatalf("simd_p_i64x2_ge_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i64x2_gt_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i64x2_gt_s(a, b) {
|
|
t.Fatalf("simd_p_i64x2_gt_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i64x2_le_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i64x2_le_s(a, b) {
|
|
t.Fatalf("simd_p_i64x2_le_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i64x2_lt_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i64x2_lt_s(a, b) {
|
|
t.Fatalf("simd_p_i64x2_lt_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i64x2_mul(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i64x2_mul(a, b) {
|
|
t.Fatalf("simd_p_i64x2_mul(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i64x2_ne(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i64x2_ne(a, b) {
|
|
t.Fatalf("simd_p_i64x2_ne(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i64x2_sub(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i64x2_sub(a, b) {
|
|
t.Fatalf("simd_p_i64x2_sub(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_add(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_add(a, b) {
|
|
t.Fatalf("simd_p_i8x16_add(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_add_sat_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_add_sat_s(a, b) {
|
|
t.Fatalf("simd_p_i8x16_add_sat_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_add_sat_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_add_sat_u(a, b) {
|
|
t.Fatalf("simd_p_i8x16_add_sat_u(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_avgr_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_avgr_u(a, b) {
|
|
t.Fatalf("simd_p_i8x16_avgr_u(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_eq(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_eq(a, b) {
|
|
t.Fatalf("simd_p_i8x16_eq(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_ge_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_ge_s(a, b) {
|
|
t.Fatalf("simd_p_i8x16_ge_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_ge_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_ge_u(a, b) {
|
|
t.Fatalf("simd_p_i8x16_ge_u(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_gt_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_gt_s(a, b) {
|
|
t.Fatalf("simd_p_i8x16_gt_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_gt_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_gt_u(a, b) {
|
|
t.Fatalf("simd_p_i8x16_gt_u(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_le_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_le_s(a, b) {
|
|
t.Fatalf("simd_p_i8x16_le_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_le_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_le_u(a, b) {
|
|
t.Fatalf("simd_p_i8x16_le_u(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_lt_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_lt_s(a, b) {
|
|
t.Fatalf("simd_p_i8x16_lt_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_lt_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_lt_u(a, b) {
|
|
t.Fatalf("simd_p_i8x16_lt_u(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_max_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_max_s(a, b) {
|
|
t.Fatalf("simd_p_i8x16_max_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_max_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_max_u(a, b) {
|
|
t.Fatalf("simd_p_i8x16_max_u(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_min_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_min_s(a, b) {
|
|
t.Fatalf("simd_p_i8x16_min_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_min_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_min_u(a, b) {
|
|
t.Fatalf("simd_p_i8x16_min_u(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_narrow_i16x8_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_narrow_i16x8_s(a, b) {
|
|
t.Fatalf("simd_p_i8x16_narrow_i16x8_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_narrow_i16x8_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_narrow_i16x8_u(a, b) {
|
|
t.Fatalf("simd_p_i8x16_narrow_i16x8_u(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_ne(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_ne(a, b) {
|
|
t.Fatalf("simd_p_i8x16_ne(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_sub(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_sub(a, b) {
|
|
t.Fatalf("simd_p_i8x16_sub(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_sub_sat_s(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_sub_sat_s(a, b) {
|
|
t.Fatalf("simd_p_i8x16_sub_sat_s(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_sub_sat_u(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_sub_sat_u(a, b) {
|
|
t.Fatalf("simd_p_i8x16_sub_sat_u(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_swizzle(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_i8x16_swizzle(a, b) {
|
|
t.Fatalf("simd_p_i8x16_swizzle(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_v128_and(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_v128_and(a, b) {
|
|
t.Fatalf("simd_p_v128_and(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_v128_andnot(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_v128_andnot(a, b) {
|
|
t.Fatalf("simd_p_v128_andnot(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_v128_or(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_v128_or(a, b) {
|
|
t.Fatalf("simd_p_v128_or(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_v128_xor(a[0], a[1], b[0], b[1]); [2]uint64{l, h} != simd_v128_xor(a, b) {
|
|
t.Fatalf("simd_p_v128_xor(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_i8x16_shuffle(a[0], a[1], b[0], b[1], a[0], a[1]); [2]uint64{l, h} != simd_i8x16_shuffle(a, b, a) {
|
|
t.Fatalf("simd_p_i8x16_shuffle(%x, %x)", a, b)
|
|
}
|
|
if l, h := simd_p_v128_bitselect(a[0], a[1], b[0], b[1], a[0], a[1]); [2]uint64{l, h} != simd_v128_bitselect(a, b, a) {
|
|
t.Fatalf("simd_p_v128_bitselect(%x, %x)", a, b)
|
|
}
|
|
}
|
|
if l, h := simd_p_f32x4_abs(a[0], a[1]); [2]uint64{l, h} != simd_f32x4_abs(a) {
|
|
t.Fatalf("simd_p_f32x4_abs(%x)", a)
|
|
}
|
|
if l, h := simd_p_f32x4_ceil(a[0], a[1]); [2]uint64{l, h} != simd_f32x4_ceil(a) {
|
|
t.Fatalf("simd_p_f32x4_ceil(%x)", a)
|
|
}
|
|
if l, h := simd_p_f32x4_convert_i32x4_s(a[0], a[1]); [2]uint64{l, h} != simd_f32x4_convert_i32x4_s(a) {
|
|
t.Fatalf("simd_p_f32x4_convert_i32x4_s(%x)", a)
|
|
}
|
|
if l, h := simd_p_f32x4_convert_i32x4_u(a[0], a[1]); [2]uint64{l, h} != simd_f32x4_convert_i32x4_u(a) {
|
|
t.Fatalf("simd_p_f32x4_convert_i32x4_u(%x)", a)
|
|
}
|
|
if l, h := simd_p_f32x4_demote_f64x2_zero(a[0], a[1]); [2]uint64{l, h} != simd_f32x4_demote_f64x2_zero(a) {
|
|
t.Fatalf("simd_p_f32x4_demote_f64x2_zero(%x)", a)
|
|
}
|
|
if l, h := simd_p_f32x4_floor(a[0], a[1]); [2]uint64{l, h} != simd_f32x4_floor(a) {
|
|
t.Fatalf("simd_p_f32x4_floor(%x)", a)
|
|
}
|
|
if l, h := simd_p_f32x4_nearest(a[0], a[1]); [2]uint64{l, h} != simd_f32x4_nearest(a) {
|
|
t.Fatalf("simd_p_f32x4_nearest(%x)", a)
|
|
}
|
|
if l, h := simd_p_f32x4_neg(a[0], a[1]); [2]uint64{l, h} != simd_f32x4_neg(a) {
|
|
t.Fatalf("simd_p_f32x4_neg(%x)", a)
|
|
}
|
|
if l, h := simd_p_f32x4_sqrt(a[0], a[1]); [2]uint64{l, h} != simd_f32x4_sqrt(a) {
|
|
t.Fatalf("simd_p_f32x4_sqrt(%x)", a)
|
|
}
|
|
if l, h := simd_p_f32x4_trunc(a[0], a[1]); [2]uint64{l, h} != simd_f32x4_trunc(a) {
|
|
t.Fatalf("simd_p_f32x4_trunc(%x)", a)
|
|
}
|
|
if l, h := simd_p_f64x2_abs(a[0], a[1]); [2]uint64{l, h} != simd_f64x2_abs(a) {
|
|
t.Fatalf("simd_p_f64x2_abs(%x)", a)
|
|
}
|
|
if l, h := simd_p_f64x2_ceil(a[0], a[1]); [2]uint64{l, h} != simd_f64x2_ceil(a) {
|
|
t.Fatalf("simd_p_f64x2_ceil(%x)", a)
|
|
}
|
|
if l, h := simd_p_f64x2_convert_low_i32x4_s(a[0], a[1]); [2]uint64{l, h} != simd_f64x2_convert_low_i32x4_s(a) {
|
|
t.Fatalf("simd_p_f64x2_convert_low_i32x4_s(%x)", a)
|
|
}
|
|
if l, h := simd_p_f64x2_convert_low_i32x4_u(a[0], a[1]); [2]uint64{l, h} != simd_f64x2_convert_low_i32x4_u(a) {
|
|
t.Fatalf("simd_p_f64x2_convert_low_i32x4_u(%x)", a)
|
|
}
|
|
if l, h := simd_p_f64x2_floor(a[0], a[1]); [2]uint64{l, h} != simd_f64x2_floor(a) {
|
|
t.Fatalf("simd_p_f64x2_floor(%x)", a)
|
|
}
|
|
if l, h := simd_p_f64x2_nearest(a[0], a[1]); [2]uint64{l, h} != simd_f64x2_nearest(a) {
|
|
t.Fatalf("simd_p_f64x2_nearest(%x)", a)
|
|
}
|
|
if l, h := simd_p_f64x2_neg(a[0], a[1]); [2]uint64{l, h} != simd_f64x2_neg(a) {
|
|
t.Fatalf("simd_p_f64x2_neg(%x)", a)
|
|
}
|
|
if l, h := simd_p_f64x2_promote_low_f32x4(a[0], a[1]); [2]uint64{l, h} != simd_f64x2_promote_low_f32x4(a) {
|
|
t.Fatalf("simd_p_f64x2_promote_low_f32x4(%x)", a)
|
|
}
|
|
if l, h := simd_p_f64x2_sqrt(a[0], a[1]); [2]uint64{l, h} != simd_f64x2_sqrt(a) {
|
|
t.Fatalf("simd_p_f64x2_sqrt(%x)", a)
|
|
}
|
|
if l, h := simd_p_f64x2_trunc(a[0], a[1]); [2]uint64{l, h} != simd_f64x2_trunc(a) {
|
|
t.Fatalf("simd_p_f64x2_trunc(%x)", a)
|
|
}
|
|
if l, h := simd_p_i16x8_abs(a[0], a[1]); [2]uint64{l, h} != simd_i16x8_abs(a) {
|
|
t.Fatalf("simd_p_i16x8_abs(%x)", a)
|
|
}
|
|
if l, h := simd_p_i16x8_extadd_pairwise_i8x16_s(a[0], a[1]); [2]uint64{l, h} != simd_i16x8_extadd_pairwise_i8x16_s(a) {
|
|
t.Fatalf("simd_p_i16x8_extadd_pairwise_i8x16_s(%x)", a)
|
|
}
|
|
if l, h := simd_p_i16x8_extadd_pairwise_i8x16_u(a[0], a[1]); [2]uint64{l, h} != simd_i16x8_extadd_pairwise_i8x16_u(a) {
|
|
t.Fatalf("simd_p_i16x8_extadd_pairwise_i8x16_u(%x)", a)
|
|
}
|
|
if l, h := simd_p_i16x8_extend_high_i8x16_s(a[0], a[1]); [2]uint64{l, h} != simd_i16x8_extend_high_i8x16_s(a) {
|
|
t.Fatalf("simd_p_i16x8_extend_high_i8x16_s(%x)", a)
|
|
}
|
|
if l, h := simd_p_i16x8_extend_high_i8x16_u(a[0], a[1]); [2]uint64{l, h} != simd_i16x8_extend_high_i8x16_u(a) {
|
|
t.Fatalf("simd_p_i16x8_extend_high_i8x16_u(%x)", a)
|
|
}
|
|
if l, h := simd_p_i16x8_extend_low_i8x16_s(a[0], a[1]); [2]uint64{l, h} != simd_i16x8_extend_low_i8x16_s(a) {
|
|
t.Fatalf("simd_p_i16x8_extend_low_i8x16_s(%x)", a)
|
|
}
|
|
if l, h := simd_p_i16x8_extend_low_i8x16_u(a[0], a[1]); [2]uint64{l, h} != simd_i16x8_extend_low_i8x16_u(a) {
|
|
t.Fatalf("simd_p_i16x8_extend_low_i8x16_u(%x)", a)
|
|
}
|
|
if l, h := simd_p_i16x8_neg(a[0], a[1]); [2]uint64{l, h} != simd_i16x8_neg(a) {
|
|
t.Fatalf("simd_p_i16x8_neg(%x)", a)
|
|
}
|
|
if l, h := simd_p_i32x4_abs(a[0], a[1]); [2]uint64{l, h} != simd_i32x4_abs(a) {
|
|
t.Fatalf("simd_p_i32x4_abs(%x)", a)
|
|
}
|
|
if l, h := simd_p_i32x4_extadd_pairwise_i16x8_s(a[0], a[1]); [2]uint64{l, h} != simd_i32x4_extadd_pairwise_i16x8_s(a) {
|
|
t.Fatalf("simd_p_i32x4_extadd_pairwise_i16x8_s(%x)", a)
|
|
}
|
|
if l, h := simd_p_i32x4_extadd_pairwise_i16x8_u(a[0], a[1]); [2]uint64{l, h} != simd_i32x4_extadd_pairwise_i16x8_u(a) {
|
|
t.Fatalf("simd_p_i32x4_extadd_pairwise_i16x8_u(%x)", a)
|
|
}
|
|
if l, h := simd_p_i32x4_extend_high_i16x8_s(a[0], a[1]); [2]uint64{l, h} != simd_i32x4_extend_high_i16x8_s(a) {
|
|
t.Fatalf("simd_p_i32x4_extend_high_i16x8_s(%x)", a)
|
|
}
|
|
if l, h := simd_p_i32x4_extend_high_i16x8_u(a[0], a[1]); [2]uint64{l, h} != simd_i32x4_extend_high_i16x8_u(a) {
|
|
t.Fatalf("simd_p_i32x4_extend_high_i16x8_u(%x)", a)
|
|
}
|
|
if l, h := simd_p_i32x4_extend_low_i16x8_s(a[0], a[1]); [2]uint64{l, h} != simd_i32x4_extend_low_i16x8_s(a) {
|
|
t.Fatalf("simd_p_i32x4_extend_low_i16x8_s(%x)", a)
|
|
}
|
|
if l, h := simd_p_i32x4_extend_low_i16x8_u(a[0], a[1]); [2]uint64{l, h} != simd_i32x4_extend_low_i16x8_u(a) {
|
|
t.Fatalf("simd_p_i32x4_extend_low_i16x8_u(%x)", a)
|
|
}
|
|
if l, h := simd_p_i32x4_neg(a[0], a[1]); [2]uint64{l, h} != simd_i32x4_neg(a) {
|
|
t.Fatalf("simd_p_i32x4_neg(%x)", a)
|
|
}
|
|
if l, h := simd_p_i32x4_trunc_sat_f32x4_s(a[0], a[1]); [2]uint64{l, h} != simd_i32x4_trunc_sat_f32x4_s(a) {
|
|
t.Fatalf("simd_p_i32x4_trunc_sat_f32x4_s(%x)", a)
|
|
}
|
|
if l, h := simd_p_i32x4_trunc_sat_f32x4_u(a[0], a[1]); [2]uint64{l, h} != simd_i32x4_trunc_sat_f32x4_u(a) {
|
|
t.Fatalf("simd_p_i32x4_trunc_sat_f32x4_u(%x)", a)
|
|
}
|
|
if l, h := simd_p_i32x4_trunc_sat_f64x2_s_zero(a[0], a[1]); [2]uint64{l, h} != simd_i32x4_trunc_sat_f64x2_s_zero(a) {
|
|
t.Fatalf("simd_p_i32x4_trunc_sat_f64x2_s_zero(%x)", a)
|
|
}
|
|
if l, h := simd_p_i32x4_trunc_sat_f64x2_u_zero(a[0], a[1]); [2]uint64{l, h} != simd_i32x4_trunc_sat_f64x2_u_zero(a) {
|
|
t.Fatalf("simd_p_i32x4_trunc_sat_f64x2_u_zero(%x)", a)
|
|
}
|
|
if l, h := simd_p_i64x2_abs(a[0], a[1]); [2]uint64{l, h} != simd_i64x2_abs(a) {
|
|
t.Fatalf("simd_p_i64x2_abs(%x)", a)
|
|
}
|
|
if l, h := simd_p_i64x2_extend_high_i32x4_s(a[0], a[1]); [2]uint64{l, h} != simd_i64x2_extend_high_i32x4_s(a) {
|
|
t.Fatalf("simd_p_i64x2_extend_high_i32x4_s(%x)", a)
|
|
}
|
|
if l, h := simd_p_i64x2_extend_high_i32x4_u(a[0], a[1]); [2]uint64{l, h} != simd_i64x2_extend_high_i32x4_u(a) {
|
|
t.Fatalf("simd_p_i64x2_extend_high_i32x4_u(%x)", a)
|
|
}
|
|
if l, h := simd_p_i64x2_extend_low_i32x4_s(a[0], a[1]); [2]uint64{l, h} != simd_i64x2_extend_low_i32x4_s(a) {
|
|
t.Fatalf("simd_p_i64x2_extend_low_i32x4_s(%x)", a)
|
|
}
|
|
if l, h := simd_p_i64x2_extend_low_i32x4_u(a[0], a[1]); [2]uint64{l, h} != simd_i64x2_extend_low_i32x4_u(a) {
|
|
t.Fatalf("simd_p_i64x2_extend_low_i32x4_u(%x)", a)
|
|
}
|
|
if l, h := simd_p_i64x2_neg(a[0], a[1]); [2]uint64{l, h} != simd_i64x2_neg(a) {
|
|
t.Fatalf("simd_p_i64x2_neg(%x)", a)
|
|
}
|
|
if l, h := simd_p_i8x16_abs(a[0], a[1]); [2]uint64{l, h} != simd_i8x16_abs(a) {
|
|
t.Fatalf("simd_p_i8x16_abs(%x)", a)
|
|
}
|
|
if l, h := simd_p_i8x16_neg(a[0], a[1]); [2]uint64{l, h} != simd_i8x16_neg(a) {
|
|
t.Fatalf("simd_p_i8x16_neg(%x)", a)
|
|
}
|
|
if l, h := simd_p_i8x16_popcnt(a[0], a[1]); [2]uint64{l, h} != simd_i8x16_popcnt(a) {
|
|
t.Fatalf("simd_p_i8x16_popcnt(%x)", a)
|
|
}
|
|
if l, h := simd_p_v128_not(a[0], a[1]); [2]uint64{l, h} != simd_v128_not(a) {
|
|
t.Fatalf("simd_p_v128_not(%x)", a)
|
|
}
|
|
if simd_p_i16x8_all_true(a[0], a[1]) != simd_i16x8_all_true(a) {
|
|
t.Fatalf("simd_p_i16x8_all_true(%x)", a)
|
|
}
|
|
if simd_p_i16x8_bitmask(a[0], a[1]) != simd_i16x8_bitmask(a) {
|
|
t.Fatalf("simd_p_i16x8_bitmask(%x)", a)
|
|
}
|
|
if simd_p_i32x4_all_true(a[0], a[1]) != simd_i32x4_all_true(a) {
|
|
t.Fatalf("simd_p_i32x4_all_true(%x)", a)
|
|
}
|
|
if simd_p_i32x4_bitmask(a[0], a[1]) != simd_i32x4_bitmask(a) {
|
|
t.Fatalf("simd_p_i32x4_bitmask(%x)", a)
|
|
}
|
|
if simd_p_i64x2_all_true(a[0], a[1]) != simd_i64x2_all_true(a) {
|
|
t.Fatalf("simd_p_i64x2_all_true(%x)", a)
|
|
}
|
|
if simd_p_i64x2_bitmask(a[0], a[1]) != simd_i64x2_bitmask(a) {
|
|
t.Fatalf("simd_p_i64x2_bitmask(%x)", a)
|
|
}
|
|
if simd_p_i8x16_all_true(a[0], a[1]) != simd_i8x16_all_true(a) {
|
|
t.Fatalf("simd_p_i8x16_all_true(%x)", a)
|
|
}
|
|
if simd_p_i8x16_bitmask(a[0], a[1]) != simd_i8x16_bitmask(a) {
|
|
t.Fatalf("simd_p_i8x16_bitmask(%x)", a)
|
|
}
|
|
if simd_p_v128_any_true(a[0], a[1]) != simd_v128_any_true(a) {
|
|
t.Fatalf("simd_p_v128_any_true(%x)", a)
|
|
}
|
|
if simd_p_f16x4_cvt_bits(a[0], a[1]) != simd_f16x4_cvt_bits(a) {
|
|
t.Fatalf("simd_p_f16x4_cvt_bits(%x)", a)
|
|
}
|
|
for _, s := range []int32{0, 1} {
|
|
if math.Float32bits(simd_p_f32x4_extract_lane(a[0], a[1], s)) != math.Float32bits(simd_f32x4_extract_lane(a, s)) {
|
|
t.Fatalf("simd_p_f32x4_extract_lane(%x, %d)", a, s)
|
|
}
|
|
if math.Float64bits(simd_p_f64x2_extract_lane(a[0], a[1], s)) != math.Float64bits(simd_f64x2_extract_lane(a, s)) {
|
|
t.Fatalf("simd_p_f64x2_extract_lane(%x, %d)", a, s)
|
|
}
|
|
if simd_p_i16x8_extract_lane_s(a[0], a[1], s) != simd_i16x8_extract_lane_s(a, s) {
|
|
t.Fatalf("simd_p_i16x8_extract_lane_s(%x, %d)", a, s)
|
|
}
|
|
if simd_p_i16x8_extract_lane_u(a[0], a[1], s) != simd_i16x8_extract_lane_u(a, s) {
|
|
t.Fatalf("simd_p_i16x8_extract_lane_u(%x, %d)", a, s)
|
|
}
|
|
if simd_p_i32x4_extract_lane(a[0], a[1], s) != simd_i32x4_extract_lane(a, s) {
|
|
t.Fatalf("simd_p_i32x4_extract_lane(%x, %d)", a, s)
|
|
}
|
|
if simd_p_i8x16_extract_lane_s(a[0], a[1], s) != simd_i8x16_extract_lane_s(a, s) {
|
|
t.Fatalf("simd_p_i8x16_extract_lane_s(%x, %d)", a, s)
|
|
}
|
|
if simd_p_i8x16_extract_lane_u(a[0], a[1], s) != simd_i8x16_extract_lane_u(a, s) {
|
|
t.Fatalf("simd_p_i8x16_extract_lane_u(%x, %d)", a, s)
|
|
}
|
|
if simd_p_i64x2_extract_lane(a[0], a[1], s) != simd_i64x2_extract_lane(a, s) {
|
|
t.Fatalf("simd_p_i64x2_extract_lane(%x, %d)", a, s)
|
|
}
|
|
}
|
|
for _, s := range []int32{0, 1, 7, 31, 32, 63, 64, -1} {
|
|
if l, h := simd_p_i16x8_shl(a[0], a[1], s); [2]uint64{l, h} != simd_i16x8_shl(a, s) {
|
|
t.Fatalf("simd_p_i16x8_shl(%x, %d)", a, s)
|
|
}
|
|
if l, h := simd_p_i16x8_shr_s(a[0], a[1], s); [2]uint64{l, h} != simd_i16x8_shr_s(a, s) {
|
|
t.Fatalf("simd_p_i16x8_shr_s(%x, %d)", a, s)
|
|
}
|
|
if l, h := simd_p_i16x8_shr_u(a[0], a[1], s); [2]uint64{l, h} != simd_i16x8_shr_u(a, s) {
|
|
t.Fatalf("simd_p_i16x8_shr_u(%x, %d)", a, s)
|
|
}
|
|
if l, h := simd_p_i32x4_shl(a[0], a[1], s); [2]uint64{l, h} != simd_i32x4_shl(a, s) {
|
|
t.Fatalf("simd_p_i32x4_shl(%x, %d)", a, s)
|
|
}
|
|
if l, h := simd_p_i32x4_shr_s(a[0], a[1], s); [2]uint64{l, h} != simd_i32x4_shr_s(a, s) {
|
|
t.Fatalf("simd_p_i32x4_shr_s(%x, %d)", a, s)
|
|
}
|
|
if l, h := simd_p_i32x4_shr_u(a[0], a[1], s); [2]uint64{l, h} != simd_i32x4_shr_u(a, s) {
|
|
t.Fatalf("simd_p_i32x4_shr_u(%x, %d)", a, s)
|
|
}
|
|
if l, h := simd_p_i64x2_shl(a[0], a[1], s); [2]uint64{l, h} != simd_i64x2_shl(a, s) {
|
|
t.Fatalf("simd_p_i64x2_shl(%x, %d)", a, s)
|
|
}
|
|
if l, h := simd_p_i64x2_shr_s(a[0], a[1], s); [2]uint64{l, h} != simd_i64x2_shr_s(a, s) {
|
|
t.Fatalf("simd_p_i64x2_shr_s(%x, %d)", a, s)
|
|
}
|
|
if l, h := simd_p_i64x2_shr_u(a[0], a[1], s); [2]uint64{l, h} != simd_i64x2_shr_u(a, s) {
|
|
t.Fatalf("simd_p_i64x2_shr_u(%x, %d)", a, s)
|
|
}
|
|
if l, h := simd_p_i8x16_shl(a[0], a[1], s); [2]uint64{l, h} != simd_i8x16_shl(a, s) {
|
|
t.Fatalf("simd_p_i8x16_shl(%x, %d)", a, s)
|
|
}
|
|
if l, h := simd_p_i8x16_shr_s(a[0], a[1], s); [2]uint64{l, h} != simd_i8x16_shr_s(a, s) {
|
|
t.Fatalf("simd_p_i8x16_shr_s(%x, %d)", a, s)
|
|
}
|
|
if l, h := simd_p_i8x16_shr_u(a[0], a[1], s); [2]uint64{l, h} != simd_i8x16_shr_u(a, s) {
|
|
t.Fatalf("simd_p_i8x16_shr_u(%x, %d)", a, s)
|
|
}
|
|
}
|
|
}
|
|
for _, s := range []int32{0, 1, -1, 0x7fffffff, -0x80000000} {
|
|
if l, h := simd_p_i16x8_splat(s); [2]uint64{l, h} != simd_i16x8_splat(s) {
|
|
t.Fatalf("simd_p_i16x8_splat(%d)", s)
|
|
}
|
|
if l, h := simd_p_i32x4_splat(s); [2]uint64{l, h} != simd_i32x4_splat(s) {
|
|
t.Fatalf("simd_p_i32x4_splat(%d)", s)
|
|
}
|
|
if l, h := simd_p_i8x16_splat(s); [2]uint64{l, h} != simd_i8x16_splat(s) {
|
|
t.Fatalf("simd_p_i8x16_splat(%d)", s)
|
|
}
|
|
}
|
|
for _, s := range []int64{0, 1, -1, 1 << 62} {
|
|
if l, h := simd_p_i64x2_splat(s); [2]uint64{l, h} != simd_i64x2_splat(s) {
|
|
t.Fatalf("simd_p_i64x2_splat(%d)", s)
|
|
}
|
|
}
|
|
for _, f := range []float32{0, 1.5, -2.25e10} {
|
|
if l, h := simd_p_f32x4_splat(f); [2]uint64{l, h} != simd_f32x4_splat(f) {
|
|
t.Fatalf("simd_p_f32x4_splat(%v)", f)
|
|
}
|
|
}
|
|
for _, f := range []float64{0, 1.5, -2.25e10} {
|
|
if l, h := simd_p_f64x2_splat(f); [2]uint64{l, h} != simd_f64x2_splat(f) {
|
|
t.Fatalf("simd_p_f64x2_splat(%v)", f)
|
|
}
|
|
}
|
|
}
|