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* gcasm: keep the x64 const-shuffle emulation inside the scratch set The fused-tree emission of i8x16_shuffle_const staged its biased PSHUFB patterns in X4/X5, outside the splicer's X0-X3 scratch set. Pool values live in X4+ for the whole loop body and the window path's relocate-out-of-reach scan does not run there, so any value the allocator parked in those registers was corrupted — on the repack gemv loop the activation-scale splat died and every output came out garbage on amd64 builds with the splices enabled (GOAMD64=v2+; v1 uses the pure fallback and CI only ran v1-shaped suites for this path until the numeric kernel tests landed). Reload the pattern from the constant pool instead of holding a second biased copy and apply the bias constants as memory operands: three registers suffice and the emulation stays inside X0-X2. The regression test emits a loop whose splat must survive a const-shuffle and rejects any X4+ mention in the emulation body. Verified end to end under GOAMD64=v2: the repack numeric kernel tests and the full engine suite pass against a bundle transpiled with this fix; arm64 output is byte-identical. Co-Authored-By: Claude Fable 5 <[email protected]> * ci: execute the amd64 splices under GOAMD64=v2 The default job builds at v1, whose binaries keep the pure fallback — the spliced amd64 code paths were never executed by any CI until a consumer suite tripped over them. Run the execution-heavy suites with GOAMD64=v2 so the splices run on the runner AVX2 hardware. Co-Authored-By: Claude Fable 5 <[email protected]> * ci: scope the GOAMD64=v2 job to the full-backend suites codegen.Translate output carries its pure bodies under the asm-dormancy tag with no asm bundle by design, so internal/codegen runtime tests cannot build at v2; the spliced execution surface is the transpile backend and gcasm. Co-Authored-By: Claude Fable 5 <[email protected]> * ci: execute the arm64 splices on native hardware The flagship arm64 backend (SDOT/SMMLA splices, the fused loops) had the same execution blind spot the amd64-v2 job just closed: nothing in this repo ever RAN it. Run the full-backend suites on a native arm64 runner, mirroring the v2 job scope. Co-Authored-By: Claude Fable 5 <[email protected]> * gcasm: skip the amd64-fixture harnesses on other hosts The direct-asm gate/jump-table/perf fixtures generate amd64-only assembly and build+run it on the host, so they can only execute on amd64; on the new native arm64 CI runner the generated package has no bodies (the pure fallback is tagged out) and vet fails with undefined symbols. Declare the host requirement with an explicit skip. The arm64 job still executes the full transpile backend and the arch-neutral gcasm suites natively. Co-Authored-By: Claude Fable 5 <[email protected]> --------- Co-authored-by: Claude Fable 5 <[email protected]>
141 lines
5.2 KiB
Go
141 lines
5.2 KiB
Go
package gcasm
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import (
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"regexp"
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"strings"
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"testing"
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"github.com/goccy/wasm2go/internal/simdfuse"
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)
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// carryLoop is a minimal accumulate loop: acc = i32x4_add(acc,
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// load(s0)) over a counted range. The carried pair (node 0, the
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// f32x4/i32x4 accumulator input) seeds from the argument at entry and
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// must thereafter read the running value from its reserved register.
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func carryLoop() *simdfuse.Loop {
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tree := &simdfuse.Tree{
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Name: "simd_p_fxl_carry",
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NumScalars: 1, // s0 = load address
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NumPairs: 1, // the carried accumulator
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NeedsMem: true,
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Nodes: []simdfuse.Node{
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// node 0: the memory operand of the add.
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{Op: "v128_load", Args: []simdfuse.Arg{
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{Kind: simdfuse.ArgScalar, Index: 0},
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{Kind: simdfuse.ArgConst, Const: 0},
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}},
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// node 1: acc(pair 0) + load. Pair 0 is the carry.
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{Op: "i32x4_add", Args: []simdfuse.Arg{
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{Kind: simdfuse.ArgPairIn, Index: 0},
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{Kind: simdfuse.ArgNode, Index: 0},
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}},
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},
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Roots: []int{1},
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}
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return &simdfuse.Loop{
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Tree: tree,
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CarriedPairs: [][2]int{{0, 1}}, // pair 0 in, node 1 out
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CounterScalar: 0,
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Dec: 1,
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PreTest: true,
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}
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}
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// The loop body must read the carried accumulator from its reserved
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// register (written back at the tail), NOT rebuild it from the
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// incoming argument registers — those only hold the first iteration's
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// value, so reading them resets the accumulator every iteration.
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func TestX64LoopCarryReadsReservedRegister(t *testing.T) {
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var b strings.Builder
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spliced, _, err := x64SpliceLoop(&b, carryLoop(), &ConstPool{}, fuseTestOffs, "0", false, 0)
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if err != nil || !spliced {
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t.Fatalf("spliced=%v err=%v", spliced, err)
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}
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body := b.String()
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loopStart := strings.Index(body, "gcasmfxl0:")
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if loopStart < 0 {
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t.Fatalf("no loop label in body:\n%s", body)
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}
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loopBody := body[loopStart:]
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// The carried accumulator is reserved at X14 (poolTop). The add
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// must consume it straight from X14 — either the VEX form reading
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// it as an operand or a register copy — never a MOVQ/PINSRQ
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// rebuild from a GPR pair.
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if !regexp.MustCompile(`(MOVOU X14, X\d|X14, X\d+\n)`).MatchString(loopBody) {
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t.Errorf("loop body never reads the carried register X14:\n%s", loopBody)
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}
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// The tail writes the running value back to X14.
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if !strings.Contains(loopBody, "VMOVDQU X0, X14") && !regexp.MustCompile(`MOVOU X\d+, X14`).MatchString(loopBody) {
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t.Errorf("loop body never writes back the carried register X14:\n%s", loopBody)
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}
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// The prologue (before the loop label) seeds X14 from the argument
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// registers exactly once; the body must not rebuild it there.
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prologue := body[:loopStart]
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if !regexp.MustCompile(`, X14\n`).MatchString(prologue) {
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t.Errorf("carried register not seeded from arguments before the loop:\n%s", prologue)
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}
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}
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// shuffleConstLoop puts an i8x16_shuffle_const between two loads and a
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// carried accumulator, with a splat that stays live across the
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// shuffle — the shape whose emulation once scratched X4/X5 and
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// clobbered pool-resident values.
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func shuffleConstLoop() *simdfuse.Loop {
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sc := func(i int) simdfuse.Arg { return simdfuse.Arg{Kind: simdfuse.ArgScalar, Index: i} }
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cst := func(c int32) simdfuse.Arg { return simdfuse.Arg{Kind: simdfuse.ArgConst, Const: c} }
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nd := func(i int) simdfuse.Arg { return simdfuse.Arg{Kind: simdfuse.ArgNode, Index: i} }
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tree := &simdfuse.Tree{
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Name: "simd_p_fxl_shufconst",
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NumScalars: 1,
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NumPairs: 1,
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NeedsMem: true,
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Nodes: []simdfuse.Node{
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// node 0: a splat that must survive past the shuffle.
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{Op: "v128_load32_splat", Args: []simdfuse.Arg{sc(0), cst(0)}},
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{Op: "v128_load", Args: []simdfuse.Arg{sc(0), cst(16)}},
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{Op: "v128_load", Args: []simdfuse.Arg{sc(0), cst(32)}},
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// node 3: const-pattern shuffle of the two loads.
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{Op: "i8x16_shuffle_const", Args: []simdfuse.Arg{
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nd(1), nd(2),
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cst(0x03020100), cst(0x0b0a0908), cst(0x13121110), cst(0x1b1a1918),
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}},
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// node 4: the splat is consumed AFTER the shuffle ran.
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{Op: "i32x4_add", Args: []simdfuse.Arg{nd(3), nd(0)}},
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{Op: "i32x4_add", Args: []simdfuse.Arg{{Kind: simdfuse.ArgPairIn, Index: 0}, nd(4)}},
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},
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Roots: []int{5},
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}
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return &simdfuse.Loop{
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Tree: tree,
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CarriedPairs: [][2]int{{0, 5}},
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CounterScalar: 0,
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Dec: 1,
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PreTest: true,
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}
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}
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// The const-pattern shuffle emulation must stay inside the splicer's
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// scratch registers (X0-X3): pool values live in X4+ for the whole
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// loop body and there is no relocation pass here. The old body
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// staged the biased patterns in X4/X5 and corrupted whatever the
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// allocator had parked there.
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func TestX64LoopShuffleConstStaysInScratch(t *testing.T) {
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var b strings.Builder
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spliced, _, err := x64SpliceLoop(&b, shuffleConstLoop(), &ConstPool{}, fuseTestOffs, "0", false, 0)
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if err != nil || !spliced {
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t.Fatalf("spliced=%v err=%v", spliced, err)
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}
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body := b.String()
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shuf := regexp.MustCompile(`(?s)MOVOU ·gcb16_[0-9a-f]+\(SB\), X2.*?POR X1, X0`).FindString(body)
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if shuf == "" {
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t.Fatalf("no shuffle-const emulation in body:\n%s", body)
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}
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for _, m := range regexp.MustCompile(`X(\d+)`).FindAllStringSubmatch(shuf, -1) {
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if m[1] != "0" && m[1] != "1" && m[1] != "2" && m[1] != "3" {
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t.Fatalf("shuffle-const emulation touches X%s (outside the X0-X3 scratch set):\n%s", m[1], shuf)
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}
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}
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}
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