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Quasar Horizon (consensus composition over Pulsar / ML-DSA / BLS lanes
under Prism + LSS lifecycle), Warp 2.0 (Pulse-backed cross-chain envelope
with forward-only v1->v2 migration and lattigo ReadUint64Slice DoS fix),
benchmark report (microbench, reshare, activation, Warp 2.0 verify, Prism
composition, GPU headroom, cross-WAN latency), and NIST IR 8214C-style
submission package (spec, parameter sets, domain separation, serialization,
reference-impl pointers, evaluation report, security analysis, side-channel
considerations).
All four deliverables compile cleanly via pdflatex+bibtex and reference
the canonical proof bucket files at proofs/{definitions,pulsar,lss,quasar}.
No duplication of proof bodies; cite by file path.
97 lines
4.4 KiB
TeX
97 lines
4.4 KiB
TeX
\section{Related Work}
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\label{sec:related}
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%% ============================================================================
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\paragraph{Block-STM (Aptos / Diem).}
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Block-STM~\cite{gelashvili2022blockstm} introduced ordered speculative
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execution against a known canonical order. Its central contribution
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is treating the canonical order as a validation primitive rather than
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a serialisation bottleneck. QuasarSTM~3.0 inherits the speculative-
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execute / validate / repair structure and extends it with lane
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abstraction, three-tier validation, semantic reducers, checkpoint-
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based incremental repair, deterministic contention management, commit
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horizons, and multi-GPU sharding.
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\paragraph{TL2 (DISC 2006).}
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Transactional Locking II~\cite{dice2006tl2} introduced commit-time
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locking with a global version clock. QuasarSTM shards TL2 into
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per-lane clocks (\S\ref{sec:lanes}) and uses lane-clock invariance as
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the Tier-1 fast validation predicate (\S\ref{sec:validation}). There
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is no global clock anywhere in QuasarSTM.
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\paragraph{TicToc (SIGMOD 2016).}
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TicToc~\cite{yu2016tictoc} eliminated the global timestamp counter
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with per-data-item $(\mathit{read\_ts}, \mathit{write\_ts})$ pairs.
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QuasarSTM adopts the per-key timestamp pair (\S\ref{sec:tictoc}) to
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\emph{reduce false aborts}, with the hard rule
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(Invariant~\ref{inv:tictoc-determinism}) that timestamps cannot
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reorder consensus. Canonical TicToc derives the order from the
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timestamps; QuasarSTM accepts the order from Quasar and uses
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timestamps only to justify the absence of an abort.
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\paragraph{GPU-STM literature.}
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Cederman et al.~\cite{cederman2010} and Holey et
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al.~\cite{holey2014} catalogue SIMT livelock and scalability collapse
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under skewed access as the dominant pathologies of naive GPU-STM
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ports. QuasarSTM rejects both root causes: deterministic contention
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management (\S\ref{sec:contention}), bounded repair
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(Lemma~\ref{lem:bounded-retry}), and Prism refraction
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(\S\ref{sec:prism}) that isolates hot lanes \emph{before} STM sees
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them.
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\paragraph{Aria.}
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Aria~\cite{lu2020aria} executes a batch against a single snapshot
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and deterministically commits the maximal serializable subset.
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QuasarSTM~3.0 does \emph{not} adopt this model; the 3.1 evolution
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(\S\ref{sec:adaptive}) introduces an Aria-style commit-selection
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service.
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\paragraph{ESSN / multiversion serialization graphs.}
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Adya et al.~\cite{adya2000essn} formalise validation against a
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multiversion serialization graph. QuasarSTM~3.0 uses the simpler
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``visible-version under canonical order'' validation; the 3.1
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evolution introduces an MVSG-derived rule
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(\texttt{KnownTotalOrder}~\cite{lp010-quasarstm}).
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\paragraph{Quasar consensus stack.}
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Quasar~\cite{quasar2025} is the post-quantum BFT consensus layer that
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supplies $\preceq_{\mathrm{can}}$ to QuasarSTM.
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LP-132~\cite{lp132-quasarexec} is the GPU execution adapter that
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hosts QuasarSTM (wave-tick scheduler, device-resident rings, EVM
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fiber VM, async cold-state, per-lane cert verification).
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\subsection{Adaptive Evolution: 3.1, 3.2, 4.0}
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\label{sec:adaptive}
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QuasarSTM~3.0 (this paper) is the GPU-native ordered MVCC baseline.
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Ongoing research---out of scope for the 3.0 specification---converges
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on a hybrid adaptive thesis: predict independence, isolate owned
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state, defer commutative hot operations, use MVCC only where needed,
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validate against a known deterministic order, and keep the GPU
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commit path batched. Three named generations are tracked in the
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LP-010 living document~\cite{lp010-quasarstm}:
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\begin{itemize}[leftmargin=2em]
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\item \textbf{3.1}: ConflictSpec ABI (AFT 2025
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conflict-specifications work~\cite{aft2025conflictspec}),
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NEMO~\cite{nemo2025} LaneClass (owned / shared / hot-shared /
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commutative), Aria-style deterministic commit selection.
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\item \textbf{3.2}: RapidLane~\cite{rapidlane2025} deferred-object
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reducers, ForeSight~\cite{foresight2025} predictive scheduler,
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Chiron~\cite{chiron2025} execution-hint roots,
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Multiverse~\cite{multiverse2026} dynamic per-lane versioning
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mode.
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\item \textbf{4.0}: CSMV~\cite{csmv} GPU client/server commit
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separation, Motor~\cite{motor2024} VersionBlock RDMA layout,
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vMVCC~\cite{vmvcc} formally specified CPU reference, surgical
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operation-level concurrency for pathological long
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transactions.
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\end{itemize}
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These are research, not specification. The 3.0 spec frozen on
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December~15, 2025 stands on its own.
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%% ============================================================================
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