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First measured scaling laws for post-quantum threshold consensus on heterogeneous hardware. Real numbers from M1 Max with wgpu-native 29.0.0 (real WebGPU, not polyfill). Main findings: * CPU per-NTT cost flat at ~1.4 us across n=1..65536. * Metal: 1.5 ms per dispatch, crosses CPU at n~3260, peaks 1.48x at n=65536. * WGSL: 2.7 ms per dispatch, asymptotic per-op (1.58 us) HIGHER than CPU (1.38 us) — never crosses on M1 Max. Constraint: uint32-emulated u64 vs Metal's native u64. * Pulsar production hot path n=2688 sits below both crossovers. Per-validator GPU acceleration unprofitable; aggregator-side multi-validator batching wins. Three empirical scaling laws derived: * L1 batch-size law: T_GPU/poly(n) = D/n + tau, crossover n* = D/(tau_CPU - tau_GPU). * L2 validator-parallelism law: aggregator amortizes dispatch over k validators. * L3 epoch-amortization law: workloads that batch at epoch boundary cross n* far earlier. Sections (660 LoC of LaTeX): 01-introduction — claim summary + sharpest finding 02-methodology — bench harness, hardware, threats to validity 03-measurements — TSV-grade tables of NTT sweep + workload-level (ZAP, FHE, reshare) 04-scaling-laws — three theorems with fitted constants 05-implications — concrete posture for backend.Policy defaults 06-honesty — what was measured vs not (NVIDIA, Block-STM, DEX, e2e) 99-conclusion — production posture + queued workstreams Data/ directory carries the raw TSV (ntt-sweep-m1max-2026-05-04.tsv) emitted by the new corona_lattice_ring_sweep_bench. Honest scope: NVIDIA H100, Block-STM parallel EVM throughput, DEX matching engine, and end-to-end consensus+EVM+DEX+FHE pipeline are all queued for v0.3.0; not in this paper. Section 06 documents the boundary.
53 lines
2.3 KiB
TeX
53 lines
2.3 KiB
TeX
\section{Conclusion}
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\label{sec:conclusion}
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We presented the first measured scaling laws for post-quantum
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threshold consensus on heterogeneous hardware (CPU, Metal, WGSL via
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wgpu-native), grounded in $30$ data points across $10$ batch sizes
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and $3$ backends running the canonical Lux Pulsar NTT primitive.
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The single sharpest finding: \textbf{GPU acceleration of lattice
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crypto is a story about batch size, not throughput-per-op.} On
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Apple M1 Max:
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\begin{itemize}[nosep]
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\item Metal pays $\sim 1.5$ ms per command-buffer dispatch;
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amortizing this requires $n \geq \sim 3{,}260$ polynomials per
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call. Below that, CPU wins by $1$--$3$ orders of magnitude.
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\item WGSL via wgpu-native pays $\sim 2.7$ ms per dispatch and
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its asymptotic per-op cost is HIGHER than CPU on this hardware
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($1.58$ vs $1.38$ \textmu s), so it never crosses CPU at any
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finite batch size. The constant-factor gap is uint32-emulated u64
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arithmetic vs Metal's native u64 path.
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\item The Pulsar production hot path ($n = 2{,}688$) sits below
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both crossovers. Per-validator GPU acceleration is unprofitable;
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aggregator-side multi-validator batching wins (Theorem~\ref{thm:l2}).
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\end{itemize}
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These observations collapse into three empirical scaling laws —
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the batch-size law (L1), the validator-parallelism law (L2), and the
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epoch-amortization law (L3) — that together govern when a Lux
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component should dispatch to GPU versus stay on CPU.
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\paragraph{Production posture.}
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The default for consensus paths in \texttt{luxfi/math/backend} is
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\texttt{PolicyPureGo}: deterministic, no surprise, no GPU-vs-CPU
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transcript-byte risk. \texttt{PolicyGPUPreferred} is opt-in for
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aggregator paths and FHE evaluators, where the natural batch
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crosses the $n^*$ threshold.
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\paragraph{What's next.}
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Three follow-on workstreams are queued but out of scope for this
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paper:
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\begin{itemize}[nosep]
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\item NVIDIA H100 / RTX measurement on a CUDA-elevated CI runner.
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\item Block-STM parallel EVM throughput under contention model.
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\item End-to-end consensus + EVM + DEX + FHE pipeline measurement.
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\end{itemize}
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\S\ref{sec:honesty} documents the honest scope.
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\paragraph{Reproducibility.}
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All bench harnesses ship in tree, all KAT corpora are
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deterministic, the wgpu-native dependency is one
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\texttt{brew install}. The exact M1 Max numbers in this paper
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re-derive within $\pm 5\%$ on a warm-CPU rerun.
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