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Add explicit, literature-backed comparison scaffolds to: - lux-pq-consensus-benchmarks (sec 09): vs Mysticeti-C, HotStuff/-2, Tendermint, Snowman - lux-quasar-benchmarks (sec 15): vs Mysticeti-C, HotStuff-2, CometBFT, Snowman, TowerBFT - lux-fhe-benchmarks (sec 12): vs TFHE-rs, Concrete, OpenFHE, Microsoft SEAL - lux-zap-benchmarks (sec 14): vs Protobuf, FlatBuffers, Cap'n Proto, gRPC, QUIC, JSON-RPC - evmgpu-benchmark (sec 13): vs geth, reth, erigon, evmone, Block-STM, pevm Lux/competitor columns explicitly marked [TBD-measure] where not yet benchmarked against the competitor's own published harness. Every competitor cell is sourced to a cited paper, repo benchmark, or vendor doc. Each scaffold ends with a Reproducibility spec (hardware, software pins, commands, decision rule) for the actual controlled run. No invented Lux numbers; existing internal numbers retained but flagged as not-yet-apples-to-apples vs literature.
39 lines
1.9 KiB
TeX
39 lines
1.9 KiB
TeX
\documentclass[11pt]{article}
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\usepackage{../shared/luxcover}
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\usepackage{amsmath, amssymb, algpseudocode, graphicx, hyperref, booktabs}
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\usepackage{enumitem}
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\title{FHE Benchmarking, Cost Models, and Operational SLOs}
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\author{
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Zach Kelling\thanks{Corresponding author: [email protected]}\\
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\textit{Lux Industries, Inc.}\\
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\texttt{[email protected]}
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}
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\date{2025}
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\usepackage{amsthm}
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\newtheorem{definition}{Definition}
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\begin{document}
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\luxcoverpage
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\begin{abstract}
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We present performance benchmarks for Lux FHE, a pure Go lattice-based fully homomorphic encryption implementation with SIMD-optimized NTT. Measurements cover the full operational envelope: key generation (single and threshold), encryption/decryption throughput, boolean gate evaluation with bootstrapping, radix integer arithmetic and comparison, ciphertext serialization size, memory footprint, and ciphertext noise growth across operation chains. We define cost models that map FHE operation counts to wall-clock time and memory consumption, enabling developers to predict whether a given circuit meets latency and resource SLOs before implementation. Benchmarks are collected on commodity hardware (AMD EPYC, Apple M2) representative of validator and application server deployments. The NTT SIMD engine achieves 2.1M polynomial multiplications per second on M2, and boolean AND gates complete in 12\,ms including bootstrapping on PN10QP27 parameters.
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\end{abstract}
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\input{sections/01-introduction}
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\input{sections/02-test-environment}
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\input{sections/03-ntt-simd-performance}
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\input{sections/04-key-generation}
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\input{sections/05-boolean-gate-performance}
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\input{sections/06-integer-operation-performance}
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\input{sections/07-ciphertext-sizes}
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\input{sections/08-memory-footprint}
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\input{sections/09-demo-application-performance}
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\input{sections/10-cost-model}
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\input{sections/11-operational-slos}
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\input{sections/12-named-competitor-comparison}
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\input{sections/99-conclusion}
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\end{document}
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