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Retract the fabricated '581M/597ns / 100M+/s / 434M GPU / planet-scale' headline (a time.Sleep sim + x40 fudge that measured nothing) across the corpus. Flagship lux-lightspeed-dex rewritten (decomplected d-chain engine / dexvm atomic proxy / Go wrapper / 0x9010 CLOB facade; measured GB10 104-126M & M4 Max ~250M fills/s byte-parity-gated; Knuth-D division lever; Block-STM settlement; P3Q->starkfri rollup to Z-Chain). Technical papers (precompile-engineering, gpu-crypto-stack, evmgpu-benchmark, p3q-corona, smart-order-routing, fhe-mpc-hybrid) carry the measured impl + cross-ref the flagship. >1B/s framed honestly as N-node aggregation, never single-GPU. All compile.
111 lines
5.2 KiB
TeX
111 lines
5.2 KiB
TeX
\section{GPU CLOB Matcher Benchmarks}
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\label{sec:clob}
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The same GPU substrate that accelerates EVM opcode dispatch and
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cryptographic verification drives the Lux DEX central-limit-order-book
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(CLOB) matcher. Unlike the EVM kernel, which parallelizes \emph{across}
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independent transactions, the CLOB matcher parallelizes \emph{within} an
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order book: each price level and resting order is a lane, and a sweep of
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incoming orders against the book is one GPU dispatch. This section
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reports measured fill throughput on two hosts---an NVIDIA GB10 Blackwell
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part and an Apple M4 Max---distinct from the M1 Max benchmark machine
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used elsewhere in this paper.
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\subsection{Per-Book Arena Model}
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Each order book is allocated a contiguous device-resident \emph{arena}:
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the price-level array, resting-order queues, and the working fill buffer
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live in one block of GPU memory with no per-order allocation on the hot
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path. A match dispatch operates entirely inside the arena---the book is
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not marshalled in and out per order. Distinct markets occupy distinct
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arenas and are matched independently, which is also what makes the
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settlement layer market-shardable (below).
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\subsection{Knuth Algorithm-D Division: The 8$\times$ Lever}
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The throughput-critical inner operation is the volume-weighted average
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price (VWAP) computation across a partial fill, which reduces to a
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wide-integer division. A na\"ive bit-serial division over the
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fixed-point price representation runs 512 iterations per divide and
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dominates the kernel's instruction count. Replacing it with
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\textbf{Knuth's Algorithm~D} (multi-word long division, \emph{TAOCP}
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Vol.~2 \cite{knuth-taocp2}) collapses the divide to a handful of
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multiword steps and yields a measured \textbf{$\sim$8$\times$ speedup} of
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the matcher kernel over the 512-iteration bit-serial baseline. This is
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the single largest lever in the matcher and is the reason the per-fill
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times below reach the single-digit-nanosecond range.
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\subsection{Byte-Parity Gating Against the CPU Oracle}
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The matcher follows the same byte-equality discipline as the
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cryptographic kernels of this paper: a first-party CPU matcher is the
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canonical oracle, and the GPU matcher is required to
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produce \textbf{byte-identical} fill sets---same fills, same quantities,
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same trade identifiers, same ordering---on every input. The contract is
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enforced by millions of randomized fuzz orders and a fixed
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known-answer-test (KAT) corpus, with \textbf{zero} parity failures
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recorded across the harness. A GPU result that diverges from the CPU
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oracle by a single byte fails the gate and blocks the release. Matching
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is consensus-critical, so this is not a soft target: GPU and CPU must
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agree exactly or the GPU path is not shipped.
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\subsection{Measured Fill Throughput}
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\begin{table}[h]
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\centering
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\small
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\begin{tabular}{lrrl}
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\toprule
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\textbf{Host} & \textbf{Fills/sec} & \textbf{Per-fill} & \textbf{Source} \\
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\midrule
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GB10 (Blackwell) & 104--126\,M & 6.9\,ns & measured, byte-parity gated \\
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M4 Max & $\sim$250\,M & 4.15\,ns & measured, byte-parity gated \\
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\bottomrule
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\end{tabular}
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\caption{GPU CLOB matcher fill throughput, byte-identical to the CPU
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oracle. Per-fill latency is the reciprocal of fill throughput. The matcher
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is \textbf{dependency-latency-bound}: throughput is limited by the
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data-dependent chain through each fill (read book, match, update,
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emit fill), not by raw arithmetic or memory bandwidth, which is why a
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single device tops out in the hundreds of millions of fills per second
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rather than the billions.}
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\label{tab:clob-throughput}
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\end{table}
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\subsection{There Is No Billion-Fills-Per-Second Single GPU}
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The dependency-latency bound is a hard ceiling, not a tuning target. A
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single GPU sustains $\sim$100--250\,M fills/sec; it does not reach
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$10^9$. Aggregate fill rates above one billion per second are reachable
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by exactly two routes, and the paper is explicit about which is built:
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\begin{itemize}
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\item \textbf{N-node aggregation.} Market-sharded matching across a
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fleet of GPUs sums the per-device rates; the aggregate scales with
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node count because distinct markets are independent arenas. This is
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the deployed scaling path.
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\item \textbf{Q64.64 representation.} A wider fixed-point
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representation that shortens the per-fill dependency chain could
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raise single-device throughput, but this is \emph{not built}; it is
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noted only to bound the design space.
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\end{itemize}
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Any claim of $>$$10^9$ fills/sec on a single GPU is incorrect; the
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measured single-device numbers are those in
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Table~\ref{tab:clob-throughput}.
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\subsection{Settlement: Market-Sharded Block-STM}
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Fills produced by the matcher are settled through the Block-STM layer
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described earlier in this paper, sharded by market: each market is an
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independent conflict domain, so cross-market settlement proceeds
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without serialization. The measured conflict-detection throughput is
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\textbf{2.2\,M fills/sec}, and the CPU and GPU settlement paths are
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\textbf{byte-identical}---the same parity contract as the matcher. The
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settlement conflict-detector, not the matcher, is the throughput floor
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of the end-to-end on-chain path; the matcher's hundreds-of-millions rate
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is the in-memory matching ceiling, and settlement consensus is the rate
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at which those fills durably commit.
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%% ============================================================
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