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Every rendered "T-Chain" / "ThresholdVM" / "teleportvm" reference across the paper corpus is rewritten to the correct canonical chain by concern: threshold signing / MPC / bridge custody / key recovery -> M-Chain (MVM); FHE / encrypted compute / threshold decryption -> F-Chain (FVM); teleport / cross-chain messaging -> B-Chain (bridgevm); consensus Pulsar stays Q-Chain. Section lux-trust-kernel/03-t-chain-threshold-governance.tex renamed -> 03-f-chain-encrypted-policy.tex (with \input + xref fixes). Braided "T-Chain" sections split by concern (M vs F). Only lp-020's chain-separation rationale and the shared lux/chains/thresholdvm library path retain the name, to record the removal. All changed papers rebuilt (pdflatex, rc=0, no undefined refs). ยง09 of lux-dao-governance-framework reframed: fabricated "production deployment" metrics ($50M/$240k/$12M, survey %s, "as of Oct 2024") relabeled as illustrative design configurations with no invented replacements; reality noted (DAO treasury is a 1/1 Safe); conclusion echo + one "first production" overclaim softened. This commit also captures concurrent corpus workstreams on the same tree. Co-authored-by: Hanzo Dev <[email protected]>
229 lines
8.5 KiB
TeX
229 lines
8.5 KiB
TeX
\section{Measured Benches: NVIDIA GB10 Grace Blackwell sm\_120}
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\label{sec:measured}
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\paragraph{Provenance.} All numbers in this section were measured
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2026-06-04 on \texttt{spark} (DGX Spark, NVIDIA GB10 Grace
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Blackwell Superchip, sm\_120, CUDA 13.0.88, driver 580.159.03,
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\SI{121}{GiB} unified memory, 48 SMs)
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\cite{blackwell2024,gracehopper2023}. The benchmark source is
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\texttt{/tmp/gpu-vtbl-bench/bench.c} calling the public
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\texttt{lux\_gpu\_*} C API; the backend is the CUDA
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plugin at \texttt{lux-private/gpu-kernels/backends/cuda/}
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(\texttt{build-wire/libluxgpu\_backend\_cuda.so}, ABI v12,
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sm\_120 native). Each row reports a measurement, not a
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projection.
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\subsection{BLS12-381 EIP-2537 pairing}
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The headline GPU primitive on Blackwell is the BLS12-381
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EIP-2537 pairing kernel \cite{eip2537,bls12381}. The Miller loop
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plus final exponentiation run on the GPU; multiple pairings batch
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into one kernel grid.
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\begin{table}[h]
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\centering
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\small
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\begin{tabular}{@{}p{3.3cm}p{2.4cm}rp{4cm}@{}}
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\toprule
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\textbf{Operation} & \textbf{Batch} & \textbf{Per-op}
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& \textbf{Source} \\
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\midrule
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BLS12-381 pairing & $N{=}1$ & \SI{198}{\micro\second}
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& \texttt{cuda\_op\_bls12\_381\_} \texttt{pairing\_eip2537} \\
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BLS12-381 pairing & $N{=}64$ & \SI{19.1}{\micro\second}
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& same \\
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BLS12-381 pairing & $N{=}256$ & \SI{19.0}{\micro\second}
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& same \\
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BLS12-381 pairing & $N{=}1024$ & \SI{19.1}{\micro\second}
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& same \\
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BLS12-381 sustained
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throughput & $N{=}256$ batches & \num{49197}~pairings/sec
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& sustained \SI{25}{\second} run \\
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\bottomrule
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\end{tabular}
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\caption{BLS12-381 EIP-2537 pairing on Grace Blackwell sm\_120.
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The $N{=}1$ point is launch-overhead-dominated; from $N{=}64$
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upward the per-pair cost plateaus at \SI{19}{\micro\second}.
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Throughput row is sustained over \SI{25}{\second} at 90--94\%
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GPU utilization, \SI{20}{\watt} board power.}
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\label{tab:bls-measured}
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\end{table}
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\paragraph{Per-pairing crossover.} GPU per-pair
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(\SI{19}{\micro\second}) beats single-thread CPU blst
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\cite{blst} ($\sim$\SI{1}{\milli\second}) from $N{=}1$; beats
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20-core parallel CPU ($\sim$\SI{50}{\micro\second} per pair)
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from $N{\geq}3{-}4$. For block-verify workloads ($N{\geq}64$
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typical) the GPU is unambiguously the right substrate.
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\paragraph{Comparison to the prior projection.} The earlier LP-203
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draft projected BLS verify at \SI{0.5}{\micro\second} to
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\SI{1.5}{\micro\second} per signature from H100 FP64 plus Miller
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loop arithmetic. The measured GB10 cost is
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\SI{17.8}{\micro\second} to \SI{19.1}{\micro\second} per pair --
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\emph{about} $10\times$ slower than that projection. The driver
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is real-Miller-loop overhead measured on sm\_120 silicon, not
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roofline arithmetic. Subsequent LPs that depend on per-pair
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timing should use the measured number.
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\subsection{Power efficiency}
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\begin{table}[h]
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\centering
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\small
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\begin{tabular}{@{}lrr@{}}
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\toprule
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\textbf{State} & \textbf{Power} & \textbf{Temperature} \\
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\midrule
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Idle & \SI{16}{\watt} & \SI{45}{\celsius}--\SI{47}{\celsius} \\
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BLS pairing full load
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($N{=}256$ sustained) & \SI{20}{\watt}
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& \SI{50}{\celsius}--\SI{51}{\celsius} \\
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keccak256 batch full load
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($N{=}4096$ sustained) & \SI{20}{\watt}
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& \SI{50}{\celsius}--\SI{51}{\celsius} \\
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\bottomrule
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\end{tabular}
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\caption{Power and thermals on GB10 under sustained GPU load.
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$\Delta P \approx \SI{4}{\watt}$ between idle and full GPU
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load -- not a typo. Grace Blackwell's per-watt efficiency under
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crypto load is the design intent of sm\_120 silicon.}
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\label{tab:power}
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\end{table}
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\paragraph{Pairings per watt.} At \num{49197}~pairings/sec
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sustained and \SI{4}{\watt} marginal power (load minus idle),
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the GB10 delivers $\approx$~\num{12300}~pairings per watt. For
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comparison, x86 CPU baselines at $\sim$\SI{50}{\micro\second}
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per pair on a 20-core part drawing $\sim$\SI{150}{\watt} TDP
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deliver $\sim$\num{130} pairings per watt -- two orders of
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magnitude worse per watt than GB10.
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\subsection{Keccak256 and SHA3-256 batch hashing}
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The Keccak family \cite{keccak} is the other measured hot path.
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Used in Merkle-tree reduction, transcript binding, and Magnetar
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SLH-DSA inner hashing.
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\begin{table}[h]
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\centering
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\small
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\begin{tabular}{@{}lrrl@{}}
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\toprule
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\textbf{Operation} & \textbf{Batch} & \textbf{Per-op}
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& \textbf{Source} \\
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\midrule
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keccak256, 32 B input & $N{=}1$ & \SI{204}{\micro\second}
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& \texttt{cuda\_op\_keccak256\_hash} \\
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keccak256, 32 B input & $N{=}4096$ & \SI{0.060}{\micro\second}
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& same \\
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keccak256 sustained
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throughput & $N{=}4096$ batches
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& \SI{11.38}{\mega\hertz}
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& sustained \SI{13}{\second} run \\
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sha3\_256, 32 B input & $N{=}4096$ & \SI{0.059}{\micro\second}
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& \texttt{cuda\_op\_sha3\_256\_hash} \\
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\bottomrule
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\end{tabular}
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\caption{Keccak256 and SHA3-256 on Grace Blackwell sm\_120. The
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$N{=}1$ point is launch-overhead-dominated. The sustained
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throughput row holds at 32\% GPU utilization, leaving headroom
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to interleave with other primitives.}
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\label{tab:hash-measured}
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\end{table}
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\paragraph{Per-hash crossover.} GPU baseline at $\sim$\SI{200}{
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\micro\second} per kernel launch is launch-overhead-dominated for
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single hashes. CPU single-thread keccak runs at
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\SI{0.4}{\micro\second} to \SI{0.9}{\micro\second} per op. GPU
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wins from $N{\geq}\sim$\num{500} (single-thread CPU comparison)
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or $N{\geq}\sim$\num{10000} (20-core parallel CPU comparison).
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The kernel is small-input-optimized; large-input single-keccak
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(\SI{1}{MiB}) hits only \SI{19}{MB/s} throughput, which is
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\emph{not} the intended workload.
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\subsection{Corona threshold combine}
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\begin{table}[h]
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\centering
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\small
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\begin{tabular}{@{}p{3cm}rrp{5cm}@{}}
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\toprule
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\textbf{Operation} & \textbf{$N$ ($k$)} & \textbf{Per-share}
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& \textbf{Source} \\
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\midrule
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Corona combine & 64 (33) & \SI{0.082}{\micro\second}
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& \textbf{OpenMP-CPU path, not GPU} --
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\texttt{cuda\_op\_corona\_} \texttt{combine\_batch} uses
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\texttt{\#pragma omp parallel for} \\
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Corona combine & 128 (65) & \SI{0.080}{\micro\second}
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& same OMP-CPU path \\
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\bottomrule
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\end{tabular}
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\caption{Corona threshold-combine measured times. Labeled
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``CUDA op'' for ABI consistency, but the implementation today
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is the host-side OpenMP path.
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Combine is fast even on CPU; the gap to close is the partial-sign
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side (\S\ref{sec:gaps}).}
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\label{tab:corona-combine}
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\end{table}
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\subsection{Composite signature-verify status}
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The composite signature-verify wrappers return
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\texttt{LUX\_BACKEND\_ERROR\_NOT\_SUPPORTED} on the GB10 bench.
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The kernels for the underlying primitives exist; the composite
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wrappers are explicit stubs. \S\ref{sec:gaps} inventories the
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exact split.
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\begin{table}[h]
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\centering
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\small
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\begin{tabular}{@{}p{3.5cm}p{8cm}@{}}
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\toprule
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\textbf{Verify wrapper} & \textbf{Status} \\
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\midrule
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ML-DSA verify (Pulsar) & \texttt{LUX\_BACKEND\_ERROR\_NOT\_SUPPORTED} --
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\texttt{cuda\_op\_mldsa\_verify\_batch} is an explicit stub in
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\texttt{plugin.cpp} \\
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SLH-DSA verify (Magnetar, composite) &
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\texttt{LUX\_BACKEND\_ERROR\_NOT\_SUPPORTED} -- the 4 SLH-DSA
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primitives (\texttt{wotsplus\_chain}, \texttt{fors\_subtree},
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\texttt{xmss\_subtree}, \texttt{hmsg\_prfmsg}) ARE real GPU;
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the composite \texttt{op\_slhdsa\_verify\_batch} is stub \\
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Ed25519 verify & \texttt{LUX\_BACKEND\_ERROR\_NOT\_SUPPORTED} --
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\texttt{cuda\_op\_ed25519\_verify\_batch} is an explicit stub \\
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sr25519 verify & \texttt{LUX\_BACKEND\_ERROR\_NOT\_SUPPORTED} --
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\texttt{cuda\_op\_sr25519\_verify\_batch} is an explicit stub \\
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\bottomrule
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\end{tabular}
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\caption{Composite signature-verify wrapper status on the GB10
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bench. The primitives the wrappers would call are real GPU code
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with measured kernel throughput; the wrapper layer is stub.}
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\label{tab:composite-status}
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\end{table}
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\subsection{What the measured numbers say}
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Two assertions from the measured set:
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\begin{enumerate}[leftmargin=2em,nosep]
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\item \textbf{Grace Blackwell's BLS12-381 pairing is
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production-ready.} At \SI{19}{\micro\second} per pair
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sustained, $N{=}256$ batches deliver $\approx$
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\num{49197}~pairings/sec at \SI{20}{\watt}. A 1000-tx block
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of BLS-signed transactions verifies in
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$\sim$\SI{20}{\milli\second} per block on a single GPU.
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\item \textbf{Keccak256 is a side-car, not the bottleneck.}
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At \SI{11.38}{\mega\hertz} sustained, hashing 1000 leaves
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costs $<$\SI{1}{\milli\second} -- well below the BLS verify
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cost above. Merkle reduction is bottlenecked by the
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reduction tree's $\log_2(N)$ kernel-launch chain, not the
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per-hash cost.
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\end{enumerate}
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The next assertion (PQ-strict end-to-end on GPU at
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\SI{15}{\milli\second}--\SI{50}{\milli\second}) requires the
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composite signature-verify wrappers to land. Until then it is a
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projection, not a measurement.
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