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First measured scaling laws for post-quantum threshold consensus on heterogeneous hardware. Real numbers from M1 Max with wgpu-native 29.0.0 (real WebGPU, not polyfill). Main findings: * CPU per-NTT cost flat at ~1.4 us across n=1..65536. * Metal: 1.5 ms per dispatch, crosses CPU at n~3260, peaks 1.48x at n=65536. * WGSL: 2.7 ms per dispatch, asymptotic per-op (1.58 us) HIGHER than CPU (1.38 us) — never crosses on M1 Max. Constraint: uint32-emulated u64 vs Metal's native u64. * Pulsar production hot path n=2688 sits below both crossovers. Per-validator GPU acceleration unprofitable; aggregator-side multi-validator batching wins. Three empirical scaling laws derived: * L1 batch-size law: T_GPU/poly(n) = D/n + tau, crossover n* = D/(tau_CPU - tau_GPU). * L2 validator-parallelism law: aggregator amortizes dispatch over k validators. * L3 epoch-amortization law: workloads that batch at epoch boundary cross n* far earlier. Sections (660 LoC of LaTeX): 01-introduction — claim summary + sharpest finding 02-methodology — bench harness, hardware, threats to validity 03-measurements — TSV-grade tables of NTT sweep + workload-level (ZAP, FHE, reshare) 04-scaling-laws — three theorems with fitted constants 05-implications — concrete posture for backend.Policy defaults 06-honesty — what was measured vs not (NVIDIA, Block-STM, DEX, e2e) 99-conclusion — production posture + queued workstreams Data/ directory carries the raw TSV (ntt-sweep-m1max-2026-05-04.tsv) emitted by the new corona_lattice_ring_sweep_bench. Honest scope: NVIDIA H100, Block-STM parallel EVM throughput, DEX matching engine, and end-to-end consensus+EVM+DEX+FHE pipeline are all queued for v0.3.0; not in this paper. Section 06 documents the boundary.
156 lines
5.9 KiB
TeX
156 lines
5.9 KiB
TeX
\section{Scaling Laws}
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\label{sec:scaling-laws}
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The measurement data in \S\ref{sec:measurements} fits a simple
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two-parameter model for each backend:
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\begin{equation}
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T_\text{batch}(n) = D + \tau \cdot n
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\label{eq:cost-model}
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\end{equation}
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where $D$ is the fixed dispatch cost paid per call (independent of
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batch size), $\tau$ is the asymptotic per-poly cost, and $n$ is the
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batch size. The per-poly cost is then:
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\begin{equation}
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T_\text{poly}(n) = \frac{D}{n} + \tau
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\label{eq:per-poly}
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\end{equation}
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Fitting Eq.~\ref{eq:per-poly} to the M1 Max data yields:
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\begin{table}[H]
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\centering
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\caption{Fitted constants for each backend on M1 Max.}
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\label{tab:fit}
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\small
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\begin{tabular}{lrr}
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\toprule
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Backend & $D$ (ms) & $\tau$ (\textmu s/poly) \\
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\midrule
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CPU scalar & 0.0 & 1.38 \\
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Metal native & 1.5 & 0.92 \\
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WGSL via wgpu-native & 2.7 & 1.58 \\
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\bottomrule
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\end{tabular}
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\end{table}
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CPU has zero dispatch overhead; the per-call constant absorbs into
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the per-poly term. Metal pays $\sim 1.5$ ms per command-buffer
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submit (metallib lookup + queue commit + waitUntilCompleted). WGSL
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via wgpu-native pays $\sim 2.7$ ms (slightly more — the staging-
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buffer readback adds a synchronous map+unmap to the round-trip).
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The crossover batch size where GPU first beats CPU is then:
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\begin{equation}
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n^* = \frac{D}{\tau_\text{CPU} - \tau_\text{GPU}}
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\end{equation}
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For Metal: $n^*_\text{Metal} = 1500 / (1.38 - 0.92) = 3{,}260$ —
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Metal first ties CPU at $n \approx 3{,}260$ polys, consistent with
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the measured crossover in $(4096, 16384]$.
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For WGSL: $\tau_\text{WGSL} = 1.58 > \tau_\text{CPU} = 1.38$, so
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the asymptotic per-poly cost is HIGHER than CPU and there is NO
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crossover at any finite batch size. WGSL gets closer to CPU as
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$n$ grows but never beats it on this hardware.
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\subsection{Three empirical scaling laws}
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From the cost model and the measured constants we derive:
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\begin{theorem}[Batch-size law]
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\label{thm:l1}
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GPU dispatch cost is paid per call, not per polynomial. Therefore
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GPU-vs-CPU per-poly speedup follows
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\[
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\frac{T_\text{CPU,poly}(n)}{T_\text{GPU,poly}(n)}
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= \frac{\tau_\text{CPU}}{\tau_\text{GPU} + D/n}
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\]
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which approaches
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$\tau_\text{CPU} / \tau_\text{GPU}$ asymptotically and falls
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to zero as $n \to 1$. Crossover occurs at
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$n^* = D / (\tau_\text{CPU} - \tau_\text{GPU})$ when
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$\tau_\text{GPU} < \tau_\text{CPU}$, never if
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$\tau_\text{GPU} \geq \tau_\text{CPU}$.
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\end{theorem}
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\textit{Implication for blockchain consensus.} A single threshold
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signature dispatches $\sim 2{,}688$ NTTs (Pulsar Round-1 mat-mul).
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On M1 Max this falls below the Metal crossover. Per-validator GPU
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acceleration is therefore unprofitable for individual signing — the
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GPU only earns its keep when the workload aggregates across
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multiple validators or multiple signing rounds.
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\begin{theorem}[Validator-parallelism law]
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\label{thm:l2}
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A single validator's per-signature workload of $W$ polynomials is
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dispatch-cost-limited if $W < n^*$. The aggregator that batches $k$
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validators' work into one GPU dispatch sees per-validator cost
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\[
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T_\text{aggregate}(k) = D + \tau_\text{GPU} \cdot k \cdot W
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\]
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amortizing the dispatch over $k$ validators.
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\end{theorem}
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\textit{Implication for Pulsar/Quasar.} A 64-validator quorum that
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batches all Round-1 NTTs into one Metal dispatch sees
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$kW = 64 \cdot 2688 = 172{,}032$ polynomials per dispatch. From
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Table~\ref{tab:ntt-sweep} extrapolation: $\tau_\text{Metal} \approx
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0.93$ \textmu s/poly $\Rightarrow$ batch wall-clock $\approx 162$ ms.
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Compared to the per-validator CPU baseline of $1.38 \cdot 2688 =
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3.7$ ms $\times 64$ validators $= 237$ ms aggregate (assuming
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perfect parallelism), Metal saves $\sim 32\%$ at this scale.
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\begin{theorem}[Epoch-amortization law]
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\label{thm:l3}
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A workload that collects $N_\text{epoch}$ polynomial operations over
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an epoch (block, finality round, FHE evaluation) and batches them
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through GPU dispatches at the epoch boundary observes effective
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per-op cost
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\[
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T_\text{epoch-eff}
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= \frac{D \cdot \lceil N_\text{epoch} / B_\text{max} \rceil + \tau_\text{GPU} \cdot N_\text{epoch}}{N_\text{epoch}}
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\]
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where $B_\text{max}$ is the maximum batch size the GPU memory
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budget supports. This trades per-op latency (the worst-case op
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waits up to $T_\text{epoch}$ before its batch closes) for per-op
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throughput (asymptotic to $\tau_\text{GPU}$).
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\end{theorem}
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\textit{Implication for FHE coprocessors.} An FHE coprocessor that
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defers evaluation to epoch close (every block, every finality
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round) crosses the GPU break-even far earlier than per-tx FHE,
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because the natural batch is the union of every encrypted-state
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read across the epoch. For a Lux block with $T_\text{tx} = 1{,}000$
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transactions each touching $4$ FHE ciphertexts, the natural batch
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is $4{,}000$ ops — already past the Metal crossover.
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\subsection{What the laws explain}
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The laws collapse a folk-knowledge claim ("GPU is faster for
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post-quantum crypto") into a quantitative statement: GPU is faster
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\emph{for batch sizes above $n^* \approx D / \Delta\tau$, where $D$
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is the dispatch cost and $\Delta\tau$ is the asymptotic per-op
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advantage}. Either of the following kills the GPU win:
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\begin{itemize}[nosep]
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\item Per-call dispatch cost $D$ is too high relative to the
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workload's natural batch size (the WGSL case at small $n$).
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\item Asymptotic per-op cost $\tau_\text{GPU}$ is no better than
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$\tau_\text{CPU}$ (the WGSL case at large $n$).
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\end{itemize}
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The first failure mode is fixable by amortization (Theorems
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\ref{thm:l2}, \ref{thm:l3}). The second failure mode means the GPU
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backend is fundamentally not competitive on this hardware for this
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kernel — uint32-emulated u64 arithmetic in WGSL costs more than
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native u64 on the same Apple GPU through Metal.
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This is not a verdict against WGSL; it is a verdict that
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\emph{native uint64 GPU paths matter for lattice crypto, and
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WebGPU's uint32-only contract leaves performance on the table.} A
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WGSL-2.0 spec with native uint64 (proposed but unshipped at time
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of writing) would close that gap.
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