mirror of
https://github.com/lux-apps/papers.git
synced 2026-11-03 05:07:46 +00:00
zeekay
f4ee7a0525
Bylines, paper authorship, correspondence addresses and the founder blurb under each post named an individual. They name the organisation that published the work instead: the brand on posts and pages, the research byline on papers, and research@ in place of a personal address. Both are what these repositories already used elsewhere — nothing new was coined. Co-authors are untouched. Where a paper named someone else alongside, they stay named; only the one byline changed. Bibliography entries, running heads, PDF metadata and affiliations move with it, so a citation still resolves to whoever the cited paper names. Sample and fixture data uses the placeholder name these tests already use elsewhere, so no assertion changed meaning.
39 lines
1.9 KiB
TeX
39 lines
1.9 KiB
TeX
\documentclass[11pt]{article}
|
|
\usepackage{../shared/luxcover}
|
|
\usepackage{amsmath, amssymb, algpseudocode, graphicx, hyperref, booktabs}
|
|
\usepackage{enumitem}
|
|
|
|
\title{FHE Benchmarking, Cost Models, and Operational SLOs}
|
|
\author{
|
|
Lux Research\thanks{Corresponding author: [email protected]}\\
|
|
\textit{Lux Industries, Inc.}\\
|
|
\texttt{[email protected]}
|
|
}
|
|
\date{2025}
|
|
|
|
\usepackage{amsthm}
|
|
\newtheorem{definition}{Definition}
|
|
\begin{document}
|
|
|
|
\luxcoverpage
|
|
|
|
\begin{abstract}
|
|
We present performance benchmarks for Lux FHE, a pure Go lattice-based fully homomorphic encryption implementation with SIMD-optimized NTT. Measurements cover the full operational envelope: key generation (single and threshold), encryption/decryption throughput, boolean gate evaluation with bootstrapping, radix integer arithmetic and comparison, ciphertext serialization size, memory footprint, and ciphertext noise growth across operation chains. We define cost models that map FHE operation counts to wall-clock time and memory consumption, enabling developers to predict whether a given circuit meets latency and resource SLOs before implementation. Benchmarks are collected on commodity hardware (AMD EPYC, Apple M2) representative of validator and application server deployments. The NTT SIMD engine achieves 2.1M polynomial multiplications per second on M2, and boolean AND gates complete in 12\,ms including bootstrapping on PN10QP27 parameters.
|
|
\end{abstract}
|
|
|
|
\input{sections/01-introduction}
|
|
\input{sections/02-test-environment}
|
|
\input{sections/03-ntt-simd-performance}
|
|
\input{sections/04-key-generation}
|
|
\input{sections/05-boolean-gate-performance}
|
|
\input{sections/06-integer-operation-performance}
|
|
\input{sections/07-ciphertext-sizes}
|
|
\input{sections/08-memory-footprint}
|
|
\input{sections/09-demo-application-performance}
|
|
\input{sections/10-cost-model}
|
|
\input{sections/11-operational-slos}
|
|
\input{sections/12-named-competitor-comparison}
|
|
\input{sections/99-conclusion}
|
|
|
|
\end{document}
|