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zeekay
08440f23dd
Drops the named-competitor scaffold's TFHE-rs and Concrete (both Zama) entries from
lux-fhe-benchmarks and the matching bibliography. The CGGI academic citation for the
underlying TFHE scheme (Chillotti et al., Journal of Cryptology 2020) is kept — it's
the scheme we implement, not a library we depend on. Competitor coverage retained:
TFHE-CGGI reference, OpenFHE, VeloFHE/OpenFHE-GPU, Microsoft SEAL.
Other touch-ups in the same sweep:
lux-fhe-runtime/08-related-work.tex — rewrites "Concrete (Zama)" subsection
as a generic "FHE compiler stacks" one.
lux-fhe-smart-contracts main + 03 — positive framing ("on luxfi/lattice")
instead of negative ("not tfhe-rs, not Zama").
legacy-md/FOLLOW-UPS-2026-05-12.md — drops Zama tfhe-rs from the bench harness
plan; OpenFHE + Lux-FHE only.
Lux FHE is native: luxfi/fhe + luxfi/lattice, with optional C++ / GPU (Metal+CUDA) /
FPGA acceleration paths. No tfhe-rs, no Zama, no external library wrapping.
106 lines
4.7 KiB
TeX
106 lines
4.7 KiB
TeX
\section{Named-Competitor Comparison Scaffold}
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\label{sec:fhe-named-competitors}
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%% ============================================================================
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To make the Lux-FHE claims falsifiable we publish here a comparison-table
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scaffold against the most widely benchmarked open-source FHE libraries
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that share an open, reproducible benchmark surface.
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\textbf{Lux columns are \texttt{[TBD-measure]}} until the same circuits run
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on the same hardware as the competitor's published benchmark.
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\textbf{Competitor numbers are taken verbatim from the cited
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documentation / paper}; the source for every cell is listed in the
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last column.
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\subsection{Competitors}
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\begin{itemize}[nosep]
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\item \textbf{TFHE-CGGI reference}~\cite{cggi} --- the original
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Chillotti-Gama-Georgieva-Iza\-bach\`ene construction; the
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academic baseline for binary-gate / programmable-bootstrapping FHE.
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\item \textbf{OpenFHE}~\cite{albadawi2022openfhe} --- C++ library
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carrying BFV, BGV, CKKS, FHEW/TFHE; community standard for
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academic comparisons.
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\item \textbf{VeloFHE / OpenFHE-GPU}~\cite{velofhe2024} --- GPU-accelerated
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OpenFHE fork; the open GPU baseline.
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\item \textbf{Microsoft SEAL}~\cite{microsoftseal} --- BFV/CKKS;
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canonical pure-CPU baseline for arithmetic FHE.
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\end{itemize}
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\subsection{Boolean-Gate Bootstrapping Latency}
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\begin{table}[h]
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\centering
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\small
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\begin{tabular}{@{}llrrl@{}}
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\toprule
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\textbf{Library} & \textbf{Hardware} & \textbf{Gate latency} & \textbf{PBS / s} & \textbf{Source} \\
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\midrule
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\textbf{Lux-FHE (CPU)} & EPYC & \texttt{[TBD-measure]} & \texttt{[TBD-measure]} & this paper \\
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\textbf{Lux-FHE (CPU)} & Apple M2 & \texttt{[TBD-measure]} & \texttt{[TBD-measure]} & this paper \\
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\textbf{Lux-FHE (Metal)} & M1/M2/M3 GPU & \texttt{[TBD-measure]} & \texttt{[TBD-measure]} & this paper, \cite{luxevmgpu} \\
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\textbf{Lux-FHE (CUDA)} & 1$\times$H100 & \texttt{[TBD-measure]} & \texttt{[TBD-measure]} & this paper \\
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\midrule
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TFHE-CGGI ref. (CPU) & i9-9900K & $\sim$13\,ms & $\sim$77 / core & \cite{cggi} \\
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OpenFHE FHEW & x86\_64 (48-thread) & $\sim$200\,ms & $\sim$240 / 48 cores & \cite{velofhe2024} \\
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OpenFHE FHEW (GPU, VeloFHE) & RTX 4090 & $\sim$0.5\,ms & $\sim$2{,}000 & \cite{velofhe2024} \\
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\bottomrule
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\end{tabular}
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\caption{Boolean-gate (programmable bootstrapping) latency for FHE
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backends. Numbers in the bottom block are quoted verbatim from the
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cited source; Lux rows remain \texttt{[TBD-measure]}.}
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\label{tab:fhe-pbs-comparison}
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\end{table}
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\subsection{Library Coverage Matrix}
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\begin{table}[h]
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\centering
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\small
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\begin{tabular}{@{}lccccl@{}}
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\toprule
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\textbf{Library} & \textbf{Binary FHE} & \textbf{Arith. FHE} & \textbf{GPU} & \textbf{Threshold} & \textbf{Source} \\
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\midrule
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Lux-FHE & yes & CKKS / BFV (Lattigo fork) & Metal / CUDA & yes (LSS-Pulsar) & \cite{lattigov7} \\
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OpenFHE & yes & BFV/BGV/CKKS & via VeloFHE fork & no & \cite{albadawi2022openfhe,velofhe2024} \\
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Microsoft SEAL & no & BFV/CKKS & no (CPU-only) & no & \cite{microsoftseal} \\
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\bottomrule
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\end{tabular}
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\caption{Feature-coverage matrix for FHE backends in this scaffold.}
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\label{tab:fhe-coverage}
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\end{table}
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\subsection{Reproducibility (what needs to be measured)}
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\label{sec:fhe-repro}
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\begin{itemize}[nosep]
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\item \textbf{Hardware.} Three rows, each repeated on each backend:
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(1) AWS \texttt{hpc7a.96xlarge} (192-core EPYC);
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(2) Apple M2 8-perf / 4-eff cores;
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(3) single H100 plus single Apple M3 Max (for the Lux Metal path).
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\item \textbf{Software pin.} \texttt{OpenFHE} v1.1.4 (with VeloFHE
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backend at HEAD); \texttt{SEAL} 4.1.1; Lux-FHE at the same
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git SHA as this paper's freeze tag.
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\item \textbf{Circuits.} Four operations on which cross-library
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reference numbers exist in the public literature today:
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(1) 4-bit boolean AND with PBS,
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(2) 8-bit integer multiply, (3) 32-bit equality test,
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(4) CKKS slot rotation.
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\item \textbf{Commands.}
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\begin{verbatim}
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# Lux-FHE
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go test -run=. -bench=BenchmarkBootstrap -benchtime=10s ./fhe/...
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# OpenFHE
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./build/benchmark/binfhe-benchmark
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# SEAL
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./build/bin/sealbench
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\end{verbatim}
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\item \textbf{Decision rule.} A Lux-FHE win against an open
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baseline requires that the \emph{same parameter set}
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(TUniform~4-bit, q=2$^{64}$) yields lower wall-clock PBS
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latency on the same hardware, in both single-core and
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full-machine configurations. Anything else is a not-equal
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comparison.
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\end{itemize}
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%% ============================================================================
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