mirror of
https://github.com/lux-apps/papers.git
synced 2026-11-03 05:07:46 +00:00
zeekay
08440f23dd
Drops the named-competitor scaffold's TFHE-rs and Concrete (both Zama) entries from
lux-fhe-benchmarks and the matching bibliography. The CGGI academic citation for the
underlying TFHE scheme (Chillotti et al., Journal of Cryptology 2020) is kept — it's
the scheme we implement, not a library we depend on. Competitor coverage retained:
TFHE-CGGI reference, OpenFHE, VeloFHE/OpenFHE-GPU, Microsoft SEAL.
Other touch-ups in the same sweep:
lux-fhe-runtime/08-related-work.tex — rewrites "Concrete (Zama)" subsection
as a generic "FHE compiler stacks" one.
lux-fhe-smart-contracts main + 03 — positive framing ("on luxfi/lattice")
instead of negative ("not tfhe-rs, not Zama").
legacy-md/FOLLOW-UPS-2026-05-12.md — drops Zama tfhe-rs from the bench harness
plan; OpenFHE + Lux-FHE only.
Lux FHE is native: luxfi/fhe + luxfi/lattice, with optional C++ / GPU (Metal+CUDA) /
FPGA acceleration paths. No tfhe-rs, no Zama, no external library wrapping.
60 lines
2.5 KiB
TeX
60 lines
2.5 KiB
TeX
\section{Lux FHE Implementation}
|
|
|
|
\label{sec:implementation}
|
|
|
|
\subsection{Design Principles}
|
|
|
|
\begin{enumerate}[leftmargin=2em]
|
|
\item \textbf{Native Go}: The entire FHE backend is implemented in Go using the
|
|
\texttt{luxfi/lattice} library, with optional C++ / GPU (Metal+CUDA) / FPGA
|
|
acceleration paths --- self-contained, no external library dependency.
|
|
\item \textbf{NTT SIMD}: Polynomial multiplication uses the Number Theoretic
|
|
Transform with AVX-512 SIMD intrinsics via Go assembly. NTT reduces
|
|
$O(N^2)$ polynomial multiplication to $O(N \log N)$.
|
|
\item \textbf{Deterministic gas}: Every FHE operation has a fixed gas cost
|
|
proportional to its computational overhead, enabling predictable transaction
|
|
pricing.
|
|
\item \textbf{Scheme selection}: We support two FHE schemes:
|
|
\begin{itemize}
|
|
\item \textbf{TFHE} (Torus FHE): Boolean circuits. 12\,ms per bootstrapped
|
|
gate. Best for comparisons, conditionals, bit-level operations.
|
|
\item \textbf{BFV} (Brakerski-Fan-Vercauteren): Batched integer arithmetic.
|
|
45\,ms for 16-bit addition. Best for arithmetic-heavy computations
|
|
(balance updates, aggregations).
|
|
\end{itemize}
|
|
\end{enumerate}
|
|
|
|
\subsection{NTT Acceleration}
|
|
|
|
The Number Theoretic Transform is the computational bottleneck of lattice-based FHE.
|
|
For polynomials in $R_q = \mathbb{Z}_q[X]/(X^N + 1)$ with $N = 4096$ (BFV) or
|
|
$N = 1024$ (TFHE), NTT transforms a polynomial from coefficient representation to
|
|
evaluation representation in $O(N \log N)$ modular multiplications.
|
|
|
|
Our SIMD implementation processes 8 modular multiplications in parallel using AVX-512
|
|
\texttt{vpmuludq} instructions. For $N = 4096$:
|
|
|
|
\begin{table}[ht]
|
|
\centering
|
|
\caption{NTT performance (single core, AMD EPYC 7763).}
|
|
\label{tab:ntt-benchmarks}
|
|
\begin{tabular}{lrr}
|
|
\toprule
|
|
\textbf{Ring Size $N$} & \textbf{Scalar NTT} & \textbf{SIMD NTT} \\
|
|
\midrule
|
|
1{,}024 & 18\,$\mu$s & 3.2\,$\mu$s \\
|
|
2{,}048 & 42\,$\mu$s & 7.1\,$\mu$s \\
|
|
4{,}096 & 98\,$\mu$s & 15.4\,$\mu$s \\
|
|
8{,}192 & 225\,$\mu$s & 34\,$\mu$s \\
|
|
16{,}384 & 520\,$\mu$s & 78\,$\mu$s \\
|
|
\bottomrule
|
|
\end{tabular}
|
|
\end{table}
|
|
|
|
The SIMD speedup is approximately $5.6\text{--}6.7\times$, consistent with the
|
|
theoretical maximum of $8\times$ for 8-wide SIMD with memory access overhead.
|
|
|
|
%% ========================================================================
|
|
%% 4. ENCRYPTED STATE TRANSITIONS
|
|
%% ========================================================================
|