papers/quasar-4-activation-announcement.tex

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\begin{document}

\section{QuasarSTM 4.0 Activation ---
2026-02-14}\label{quasarstm-40-activation--2026-02-14}

\textbf{Audience:} Lux validators, application developers, ecosystem
partners \textbf{Activation:} 2026-02-14, 17:00 UTC \textbf{Spec:}
LP-135 (production spec) and LP-010-quasar-stm-4 (paper)

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\subsection{TL;DR}\label{tldr}

QuasarSTM 4.0 is live on Lux mainnet as of 2026-02-14, 17:00 UTC. It is
the production version of the GPU-native ordered MVCC execution fabric
that 3.0 (2025-12-25) shipped as the substrate. Every gap 3.0 left open
is now closed:

\begin{itemize}
\tightlist
\item
  \textbf{Real cryptography.} BLS12-381, Pulsar Module-LWE, and Groth16
  verifiers run on-device. The HMAC-keccak placeholders that 3.0 shipped
  at launch are gone from production.
\item
  \textbf{Full EVM.} All 175 opcodes including the entire
  \texttt{CALL}/\texttt{CREATE} family, \texttt{LOG}n,
  \texttt{EXTCODE*}, \texttt{RETURNDATA*},
  \texttt{TLOAD}/\texttt{TSTORE}, \texttt{MCOPY},
  \texttt{BLOBHASH}/\texttt{BLOBBASEFEE}. Journaled SSTORE with EIP-2929
  cold/warm and EIP-3529 refunds.
\item
  \textbf{Production validation.} Tier 1 lane-clock fast path, Tier 3
  semantic reducer commit at horizon time, ConflictSpec ABI, NEMO
  LaneClass, dynamic per-lane versioning mode.
\item
  \textbf{Production execution.} Fiber checkpoints per
  \texttt{CALL}-frame, commit horizon over Nova prefixes / Nebula causal
  cuts, MVCC GC bound to the horizon, Motor-style VersionBlock layout (8
  inline versions per key).
\item
  \textbf{Production GPU pipeline.} 16 service drains (the 12 from 3.0
  plus AdaptiveSchedule, BridgeAttest, MarketAuction, FiberCheckpoint
  --- A/B/M/F).
\item
  \textbf{Production rigor.} CSMV-style commit-server scaffold, formally
  specified CPU reference, cross-backend determinism harness gated in CI
  at \textgreater= 80\% line coverage on Apple Metal and NVIDIA CUDA.
\end{itemize}

The wire format is unchanged. The public host API
(\texttt{QuasarGPUEngine}) is unchanged. The 3.0 invariants ---
determinism, ordered serializability, repair monotonicity, horizon
safety --- are preserved verbatim.

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\subsection{What changed from 3.0}\label{what-changed-from-30}

{\def\LTcaptype{none} % do not increment counter
\begin{longtable}[]{@{}lll@{}}
\toprule\noalign{}
Topic & 3.0 (2025-12-25) & 4.0 (2026-02-14) \\
\midrule\noalign{}
\endhead
\bottomrule\noalign{}
\endlastfoot
EVM coverage & 118 opcodes (no \texttt{CALL}, no \texttt{CREATE}, no
\texttt{LOG}, no \texttt{EXTCODE*}) & 175 opcodes --- full coverage \\
SSTORE & linear write-through & journaled with EIP-2929 / EIP-3529 \\
BLS verifier & HMAC-keccak placeholder & real BLS12-381 pairing
on-device \\
Pulsar verifier & HMAC-keccak placeholder & real Module-LWE share
verify \\
Groth16 verifier & HMAC-keccak placeholder & real Groth16 over
BLS12-381 \\
Tier 1 lane-clock & sketch & production fast path \\
Tier 3 semantic reducers & enum stub & production reducer commit \\
ConflictSpec ABI & not implemented & production (Static / ABI /
Historical / UserDeclared / Precompile / Learned) \\
LaneClass & not implemented & NEMO classes (Owned / Shared / HotShared /
Commutative / Unknown) \\
Versioning mode & always-on multi-version & dynamic per-lane
(SingleVersionFast / MultiVersion / Reducer / Serialized) \\
Fiber checkpoints & not implemented & production, per CALL-frame \\
Commit horizon & sketch & production (Nova prefix / Nebula causal
cut) \\
MVCC GC & not implemented & production, horizon-driven \\
Motor VersionBlock & not implemented & production (8 inline versions per
key) \\
GPU services & 12 & 16 (12 + A/B/M/F) \\
CSMV commit server & not implemented & scaffold landed, single-GPU
production \\
Formal CPU reference & not implemented & small executable semantics +
differential fuzzer \\
Cross-backend determinism & per-backend tests & single harness,
byte-identical roots Metal == CUDA \\
Coverage & informal & \textgreater= 80\% line coverage on both backends,
gated in CI \\
\end{longtable}
}

The 4.0 deliverable train shipped over six weeks (2026-01-15 through
2026-02-07 spec freeze), as v0.41 through v0.49 milestones in
\texttt{cevm}:

{\def\LTcaptype{none} % do not increment counter
\begin{longtable}[]{@{}ll@{}}
\toprule\noalign{}
Milestone & Theme \\
\midrule\noalign{}
\endhead
\bottomrule\noalign{}
\endlastfoot
v0.41 & CUDA backend mirror --- persistent CTAs,
\texttt{\_\_threadfence}, layout-byte-identical with Metal \\
v0.42 & Cert-subject hardening, \texttt{KnownTotalOrder}, separated mode
roots \\
v0.43 & ConflictSpec ABI + LaneClass + dynamic VersioningMode +
AdaptiveSchedule drain \\
v0.44 & Real BLS12-381 pairing kernel \\
v0.45 & Real Pulsar Module-LWE + real Groth16 verifiers \\
v0.46 & Full EVM coverage + journaled SSTORE + EIP-2929/3529 + Tier 3
reducers \\
v0.47 & Predictive scheduling + Chiron-style hint roots \\
v0.48 & Motor VersionBlock + A/B/M/F drains + fiber checkpoints \\
v0.49 & CSMV commit-server scaffold + formal CPU reference +
cross-backend determinism harness \\
\end{longtable}
}

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\subsection{Performance}\label{performance}

Apple M1 Max, 1024-tx end-to-end stress on the regulated-DEX workload
mix (50\% per-account orders, 20\% cancels, 15\% fee accumulation, 10\%
balance deltas, 5\% admin):

{\def\LTcaptype{none} % do not increment counter
\begin{longtable}[]{@{}lll@{}}
\toprule\noalign{}
Metric & 3.0 & 4.0 \\
\midrule\noalign{}
\endhead
\bottomrule\noalign{}
\endlastfoot
Wallclock (median) & 150 ms & \textbf{108 ms} \\
Wave ticks & 8 & \textbf{6} \\
Repair amplification & \textasciitilde0.97 &
\textbf{\textasciitilde0.42} \\
EVM coverage & 118/175 & \textbf{175/175} \\
BLS verify (per cert) & 9 us (HMAC-keccak) & 46 us (real BLS12-381) \\
Pulsar verify (per share) & 7 us (placeholder) & 38 us (real
Module-LWE) \\
Groth16 verify (per cert) & 8 us (placeholder) & 62 us (real Groth16) \\
\end{longtable}
}

The 28\% wallclock improvement is not because 4.0 makes the same
operations cheaper --- real cryptography is 4-7x more expensive than the
HMAC-keccak placeholders. The wins come from Tier 1 lane-clock
fast-pathing \textgreater80\% of commits without an MVCC chain walk and
from Tier 3 reducers absorbing the contended writes (fee accumulators,
order-book level updates, balance deltas) that 3.0 turned into same-key
SSTORE conflicts.

The canonical Block-STM hot-key test (16 same-key contending
transactions producing 120 conflicts -\textgreater{} 120 repairs
-\textgreater{} 16 commits) is unchanged in 4.0 and is the determinism
harness\textquotesingle s headline regression. Same input
-\textgreater{} byte-identical roots on Metal and CUDA.

NVIDIA H100 cert costs for reference:

\begin{itemize}
\tightlist
\item
  BLS12-381 aggregate verify: 31 us
\item
  Pulsar share verify: 24 us
\item
  Groth16 verify: 42 us
\end{itemize}

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\subsection{Migration}\label{migration}

\subsubsection{Validators}\label{validators}

\begin{enumerate}
\def\labelenumi{\arabic{enumi}.}
\tightlist
\item
  Upgrade \texttt{cevm} to a release built from \texttt{cevm}
  \textgreater= v0.49.
\item
  Re-roll the Quasar consensus engine (LP-020) with
  \texttt{execution\_version=4} support.
\item
  Verify the cert verifier table at engine creation. On production
  networks the verifier table must be the production table; the
  \texttt{EVM\_DEV\_HMAC\_VERIFIER} flag is rejected at startup.
\item
  Run \texttt{cevm-genesis-replay} against the latest 3.0 round to
  confirm byte-identical roots before publishing.
\item
  Publish on the validator gossip channel and join 4.0 round production.
\end{enumerate}

There is no on-disk state migration. 4.0 reads 3.0 round artifacts as
historical 3.0 rounds. New rounds emitted post-activation are 4.0
rounds.

Validators that remain on 3.0 after 17:00 UTC on 2026-02-14 are rejected
by the consensus engine and must upgrade to participate.

\subsubsection{Application developers}\label{application-developers}

\begin{enumerate}
\def\labelenumi{\arabic{enumi}.}
\tightlist
\item
  Recompile contracts against the 4.0 EVM (175 opcodes). Contracts that
  compiled against 3.0 (118 opcodes) are forward-compatible.
\item
  Adopt the Solidity \texttt{lane\_class} attribute on hot state
  variables to opt into the AdaptiveSchedule fast path. Without the
  attribute, the predictor and historical sources still apply; the
  attribute adds a higher-priority \texttt{Static} source.
\item
  For DEX-style hot lanes (fee accumulators, order-book levels), adopt
  the \texttt{Commutative} class to route writes through Tier 3
  reducers. The repair-amplification reduction comes from this change.
\item
  Re-run integration tests against the cross-backend determinism
  harness; contracts that produce identical roots on Metal and CUDA are
  4.0-clean.
\end{enumerate}

\subsubsection{Ecosystem partners}\label{ecosystem-partners}

\begin{itemize}
\tightlist
\item
  Bridge operators: BridgeAttest is a new GPU drain with a stable ABI;
  existing bridge messages route through it without re-signing.
\item
  DEX operators: MarketAuction runs batched matching on-device. The
  \texttt{AuctionMatch} reducer entry replaces per-trade SSTORE
  conflicts; existing order/cancel/fill flows are forward-compatible.
\item
  Wallet integrators: no API changes. The wire-format is unchanged.
\end{itemize}

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\subsection{Backward compatibility}\label{backward-compatibility}

{\def\LTcaptype{none} % do not increment counter
\begin{longtable}[]{@{}ll@{}}
\toprule\noalign{}
Component & 3.0 -\textgreater{} 4.0 compatibility \\
\midrule\noalign{}
\endhead
\bottomrule\noalign{}
\endlastfoot
Wire format (Quasar consensus) & unchanged; LP-020 cert-lane structure
preserved \\
\texttt{QuasarRoundDescriptor} / \texttt{QuasarRoundResult} & unchanged
byte-for-byte; \texttt{hint\_roots} ride in the existing \texttt{roots}
slot \\
Public host API (\texttt{QuasarGPUEngine}) & unchanged \\
\texttt{ServiceId} enum & extended (\texttt{Count} 12 -\textgreater{}
16); old IDs unchanged \\
Layout types & \texttt{VersionBlock.MAX\_INLINE\_VERSIONS} 4
-\textgreater{} 8 (forward-compat: 4.0 reads 3.0 blocks) \\
HMAC-keccak verifier path & gated behind
\texttt{EVM\_DEV\_HMAC\_VERIFIER=1} for legacy test vectors \\
Validators running 3.0 after 2026-02-14 & rejected at the consensus
engine --- must upgrade \\
\end{longtable}
}

There is no on-disk state migration. Pre-activation rounds remain valid
as historical 3.0 rounds; the activation height is the partition.

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\subsection{Known limitations (out of scope for
4.0)}\label{known-limitations-out-of-scope-for-40}

The following are explicitly \emph{not} in 4.0 and are tracked under
QuasarSTM 5.0 research:

\begin{itemize}
\tightlist
\item
  Multi-GPU MVCC over RDMA. 4.0 ships the Motor-style VersionBlock
  layout (which is RDMA-friendly) and the CSMV commit-server scaffold
  (which is the multi-GPU pattern), but the production deployment is
  single-GPU per validator.
\item
  Operation-window validation for pathological long transactions.
\item
  Formal proof of kernel refinement against the abstract semantics. 4.0
  ships the abstract semantics in \texttt{lib/consensus/quasar/spec/}
  (executable C++ + Lean 4 stubs) and the differential fuzzer; the
  refinement proof is 5.0.
\item
  Distributed CSMV commit server (4.0 ships single-GPU).
\item
  800G InfiniBand / GPUDirect cell topologies.
\end{itemize}

These are not on the 4.0 production path. They will land in 5.0 on a
schedule TBD post-activation review.

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\subsection{References}\label{references}

\begin{itemize}
\tightlist
\item
  \textbf{LP-135} --- QuasarSTM 4.0 production spec
\item
  \textbf{LP-010-quasar-stm-4} --- QuasarSTM 4.0 paper (this
  announcement)
\item
  \textbf{LP-010} --- QuasarSTM 3.0 substrate (2025-12-25)
\item
  \textbf{LP-020} --- Quasar Consensus 3.0 (cert lanes, P/Q/Z)
\item
  \textbf{LP-132} --- QuasarGPU Execution Adapter (16 services
  post-2026-02-14)
\item
  \textbf{LP-009} --- GPU-Native EVM
\item
  \textbf{LP-070} --- ML-DSA
\item
  \textbf{LP-073} --- Pulsar
\item
  \textbf{LP-075} --- BLS
\end{itemize}

For questions:
\href{mailto:[email protected]}{\nolinkurl{[email protected]}} For
validator support:
\href{mailto:[email protected]}{\nolinkurl{[email protected]}} For
application integration:
\href{mailto:[email protected]}{\nolinkurl{[email protected]}}

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Copyright (C) 2026, Lux Industries Inc. All rights reserved.

\end{document}