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Decentralized exchange; the engine acts like an order book but is decentralized, so 'Central Limit Order Book' is a misnomer. Branded/service surface → DEX (RegisterDEX, DEXMethod*, dex_* wire). Matching engine + GPU → OrderBook (OrderBookMatch/Source/Arena, source_orderbook.go), preserving the AMM-vs-orderbook distinction. C-ABI → dex_orderbook_* (matches luxcpp). SDKs/clients/docs aligned. CGO=0 + cgo builds clean; full suite 23 pkgs green (dchain/dex/lx/fix/gateway/zapwire). Legit financial-term 'Central Limit Order Book' retained in hummingbot taxonomy.
535 lines
17 KiB
TeX
535 lines
17 KiB
TeX
\documentclass[11pt,a4paper]{article}
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\usepackage[utf8]{inputenc}
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\usepackage{amsmath,amssymb,amsfonts}
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\usepackage{graphicx}
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\usepackage{hyperref}
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\usepackage{cite}
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\usepackage{algorithm}
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\usepackage{algorithmic}
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\usepackage{booktabs}
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\usepackage{multirow}
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\usepackage{xcolor}
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\usepackage{listings}
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\usepackage{float}
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\usepackage[margin=1in]{geometry}
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% Custom commands
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\newcommand{\lxdex}{\textsc{LX}}
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\newcommand{\orderssec}{\text{orders/sec}}
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\newcommand{\microsec}{\mu\text{s}}
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\newcommand{\nanosec}{\text{ns}}
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% Code listing settings
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\lstset{
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basicstyle=\footnotesize\ttfamily,
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numbers=left,
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numberstyle=\tiny\color{gray},
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stepnumber=1,
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numbersep=5pt,
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backgroundcolor=\color{white},
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showspaces=false,
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showstringspaces=false,
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showtabs=false,
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frame=single,
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rulecolor=\color{black},
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tabsize=2,
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captionpos=b,
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breaklines=true,
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breakatwhitespace=false,
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language=Go,
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keywordstyle=\color{blue},
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commentstyle=\color{gray},
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stringstyle=\color{red}
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}
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\title{\textbf{LX: A GPU-Native Decentralized Exchange} \\
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\large{Byte-Exact \texttt{uint256} OrderBook Matching at 100--250M Fills/s per Device,
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Scaling to Fleet-Level Throughput Through Quantum-Resistant Consensus}}
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\author{
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[email protected] \\
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Lux Industries Inc. \\
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\texttt{https://lux.network}
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}
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\date{\today}
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\begin{document}
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\maketitle
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\begin{abstract}
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We present \lxdex{}, a GPU-native decentralized exchange whose central-limit
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order book (OrderBook) matching kernel computes byte-exact \texttt{uint256} fills.
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On a single accelerator the kernel sustains 104--126M fills/s on an NVIDIA GB10
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(6.9\,ns/match) and approximately 250M fills/s on an Apple M4 Max
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(4.15\,ns/match); the throughput lever is a Knuth Algorithm-D division that
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replaces a 512-iteration bit-serial \texttt{uint256} VWAP, an $\sim$8$\times$
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gain, with output byte-identical to the CPU reference (validated against
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millions of fuzz and known-answer vectors with zero divergence). Per-book
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arenas are independent, so aggregate throughput exceeding one billion fills/s
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is reached by aggregating across nodes (a fleet of roughly 8--10 accelerators),
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\emph{not} by a single device. Matching is paired with market-sharded Block-STM
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settlement (2.2M fills/s conflict-detection, with CPU and GPU producing a
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byte-identical commit order on real silicon) and a post-quantum rollup to the
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Lux Z-Chain: P3Q (ML-DSA-65, venue-trust) verifies 4{,}714 proofs/s and the
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trustless STARK/FRI verifier (\texttt{starkfri}) verifies 986 proofs/s on a toy
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AIR. The system uses the \texttt{luxfi/database} abstraction layer for
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consistent storage across backends, combining a private single-operator HFT
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matching chain (the D-Chain) with quantum-resistant consensus and Byzantine
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fault tolerance.
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\end{abstract}
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\section{Introduction}
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The cryptocurrency trading ecosystem faces a fundamental performance barrier: current decentralized exchanges (DEXs) process fewer than 1,000 transactions per second, while centralized exchanges (CEXs) handle millions. This 1000x performance gap has relegated DEXs to less than 5\% of total trading volume despite their superior security model.
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\lxdex{} closes this performance gap, achieving:
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\begin{itemize}
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\item \textbf{104--126M fills/s} of byte-exact \texttt{uint256} OrderBook matching on a single NVIDIA GB10 (6.9\,ns/match), and $\sim$250M fills/s on an Apple M4 Max (4.15\,ns/match)
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\item \textbf{$>$1B fills/s} aggregate throughput across a node fleet ($\sim$8--10 accelerators), since per-book arenas are independent --- not from a single device
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\item \textbf{2.2M fills/s} market-sharded Block-STM settlement, with a CPU/GPU byte-identical commit order
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\item \textbf{Post-quantum rollup} to the Z-Chain: P3Q (ML-DSA-65) at 4{,}714 verifies/s, trustless STARK/FRI (\texttt{starkfri}) at 986 verifies/s
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\item \textbf{Quantum-resistant consensus} via Corona+BLS hybrid signatures
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\item \textbf{GPU acceleration} with automatic MLX/CUDA detection
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\end{itemize}
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Our key innovation is a byte-exact \texttt{uint256} matching kernel that is
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correctness-bound rather than precision-truncated: GPU output is identical to
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the CPU oracle bit for bit, so the throughput gain is free of the silent
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rounding that disqualifies floating-point matchers from settlement.
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\section{System Architecture}
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\subsection{Multi-Chain Architecture}
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\lxdex{} operates across two specialized blockchains:
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\begin{itemize}
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\item \textbf{X-Chain}: Order processing and matching
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\item \textbf{Q-Chain}: Quantum finality and proof generation
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\end{itemize}
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This separation allows parallel processing of orders while maintaining cryptographic security through the Q-Chain's quantum-resistant proofs.
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\subsection{Polyglot Engine Architecture}
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We implement several matching-engine front-ends sharing one byte-exact
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\texttt{uint256} matching core, each suited to a deployment scenario. The
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byte-exact CPU reference sustains $\sim$1M fills/s and is the oracle the GPU
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kernel is validated against; the GPU back-ends (Section~\ref{sec:gpu}) raise
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single-device throughput to 104--250M fills/s.
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\begin{table}[H]
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\centering
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\begin{tabular}{lll}
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\toprule
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\textbf{Engine} & \textbf{Deployment role} & \textbf{Memory} \\
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\midrule
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Go (CPU reference) & Default, correctness oracle & Moderate \\
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C++ & High-frequency CPU path & Low \\
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Rust & Safety-critical CPU path & Low \\
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TypeScript & Client/embedded & High \\
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GPU (CUDA / MLX) & Bulk matching back-end & Low \\
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\bottomrule
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\end{tabular}
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\caption{Matching-engine front-ends and their deployment roles. All share the
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same byte-exact \texttt{uint256} core; the CPU reference is the validation
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oracle for the GPU kernels.}
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\label{tab:engines}
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\end{table}
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\subsection{Order Book Implementation}
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Our order book attains a per-match cost of 6.9\,ns on an NVIDIA GB10 and
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4.15\,ns on an Apple M4 Max through several optimizations:
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\subsubsection{Integer Price Representation}
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\begin{lstlisting}
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// Traditional (slow): string-formatted decimal price key
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priceKey := fmt.Sprintf("%.8f", order.Price)
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// Fixed-point: integer comparison, no formatting/parsing
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priceInt := int64(order.Price * 1e7) // 7 decimals
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\end{lstlisting}
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Prices and quantities are exact integers (\texttt{uint256} on the matching
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path), so price-level comparison is a single integer operation with no
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floating-point rounding and no string formatting.
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\subsubsection{Lock-Free Architecture}
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\begin{lstlisting}
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type DAGOrderBook struct {
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bestBid atomic.Value // Lock-free best bid
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bestAsk atomic.Value // Lock-free best ask
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vertices sync.Map // Concurrent DAG vertices
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edges map[ID][]ID // DAG edges
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frontier []ID // Active frontier
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}
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\end{lstlisting}
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\section{Consensus Protocol}
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\subsection{Lux Consensus (DAG-based FPC)}
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Lux Consensus is our novel DAG-based consensus protocol featuring Fast Probabilistic Consensus (FPC) as a core component. It achieves 50ms finality through:
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\begin{enumerate}
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\item \textbf{DAG Structure}: Parallel order processing without sequential blocks
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\item \textbf{Adaptive Vote Thresholds}: Dynamic adjustment from 55\% to 65\%
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\item \textbf{Vote Limiting}: Maximum 256 votes per block
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\item \textbf{Execute-Owned Optimization}: Local orders execute immediately
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\end{enumerate}
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\begin{algorithm}
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\caption{Lux Consensus Round}
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\begin{algorithmic}
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\STATE $\theta \gets \theta_{min} + (\theta_{max} - \theta_{min}) \times \frac{round}{10}$
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\FOR{each vertex $v$ in DAG}
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\STATE votes $\gets$ QueryVotes($v$)
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\IF{votes / total $> \theta$}
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\STATE Finalize($v$)
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\STATE GenerateQuantumProof($v$)
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\ENDIF
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\ENDFOR
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\end{algorithmic}
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\end{algorithm}
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\subsection{Quantum-Resistant Security}
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We implement a hybrid cryptographic scheme combining:
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\begin{itemize}
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\item \textbf{Corona}: Post-quantum lattice-based threshold signatures (Lux production fork of the two-round Corona construction, IACR ePrint 2024/1113)
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\item \textbf{BLS}: Efficient signature aggregation
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\item \textbf{Quasar}: Dual-certificate protocol for faster finality
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\end{itemize}
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\begin{lstlisting}
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type QuantumCertificate struct {
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VertexID [32]byte
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BLSSignature *Signature
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CoronaCert []byte
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VoteThreshold float64
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}
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\end{lstlisting}
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\section{Network Architecture}
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\subsection{Kernel-Bypass with DPDK}
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Direct NIC access eliminates kernel overhead:
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\begin{lstlisting}
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// Traditional: 10us per packet
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conn.Read(buffer)
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// DPDK: 100ns per packet
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rte_eth_rx_burst(port, queue, pkts, MAX_BURST)
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\end{lstlisting}
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This provides a \textbf{100x reduction} in packet processing latency.
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\subsection{RDMA State Replication}
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Zero-copy state synchronization between nodes:
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\begin{lstlisting}
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// One-sided RDMA write (no remote CPU)
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ibv_post_send(qp, &wr, &bad_wr) // <500ns latency
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\end{lstlisting}
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\subsection{Binary FIX Protocol}
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Compact 60-byte message format:
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\begin{lstlisting}
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type BinaryFIXOrder struct {
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MsgType uint8 // 1 byte: 'D'=NewOrder
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Side uint8 // 1 byte: 1=Buy, 2=Sell
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OrdType uint8 // 1 byte: 1=Market, 2=Limit
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TimeInForce uint8 // 1 byte: 0=Day, 1=IOC
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Symbol [8]byte // 8 bytes: "BTC-USD\0"
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OrderID uint64 // 8 bytes
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ClOrdID uint64 // 8 bytes
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Price uint64 // 8 bytes: Fixed point
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OrderQty uint64 // 8 bytes: Fixed point
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TransactTime uint64 // 8 bytes: Unix nanos
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Account uint32 // 4 bytes
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ExecInst uint32 // 4 bytes
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Checksum uint32 // 4 bytes: CRC32
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} // Total: 60 bytes
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\end{lstlisting}
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\section{GPU Acceleration}
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\label{sec:gpu}
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\subsection{Universal Backend Detection}
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Automatic selection of optimal compute backend:
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\begin{lstlisting}
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func detectBackend() Backend {
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if runtime.GOOS == "darwin" && hasMetalSupport() {
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return Backend_MLX_Metal
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}
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if hasCUDA() {
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return Backend_CUDA
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}
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return Backend_CPU_AVX2
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}
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\end{lstlisting}
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\subsection{Batch Matching Performance}
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\begin{table}[H]
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\centering
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\begin{tabular}{lrr}
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\toprule
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\textbf{Backend} & \textbf{Fills/s} & \textbf{Per-match cost} \\
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\midrule
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CUDA --- NVIDIA GB10 & 104--126M & 6.9\,ns \\
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MLX/Metal --- Apple M4 Max & $\sim$250M & 4.15\,ns \\
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\bottomrule
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\end{tabular}
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\caption{Measured GPU matching throughput. The throughput lever is a Knuth
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Algorithm-D division replacing a 512-iteration bit-serial \texttt{uint256}
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VWAP ($\sim$8$\times$); output is byte-identical to the CPU oracle.}
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\end{table}
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\section{Storage Layer}
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\subsection{luxfi/database Abstraction}
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Unified database interface across multiple backends:
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\begin{lstlisting}
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type Database interface {
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Get(key []byte) ([]byte, error)
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Put(key, value []byte) error
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Delete(key []byte) error
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NewBatch() Batch
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NewIterator(prefix []byte) Iterator
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Compact(start, limit []byte) error
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HealthCheck(ctx context.Context) (interface{}, error)
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}
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\end{lstlisting}
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Supported backends:
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\begin{itemize}
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\item \textbf{BadgerDB}: LSM-tree for high write throughput
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\item \textbf{LevelDB}: Proven reliability
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\item \textbf{MemDB}: In-memory for testing
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\item \textbf{PebbleDB}: RocksDB-compatible
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\end{itemize}
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\section{Performance Results}
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\subsection{Benchmark Configuration}
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Matching-kernel measurements performed on:
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\begin{itemize}
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\item NVIDIA GB10 (Grace Blackwell)
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\item Apple M4 Max (unified-memory, MLX/Metal backend)
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\end{itemize}
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All figures below are measured fills/s of byte-exact \texttt{uint256}
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matching, validated bit-for-bit against the CPU reference oracle.
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\subsection{Throughput Results}
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\begin{table}[H]
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\centering
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\begin{tabular}{lrr}
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\toprule
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\textbf{Configuration} & \textbf{Throughput} & \textbf{Per-match cost} \\
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\midrule
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GPU OrderBook --- NVIDIA GB10 & 104--126M fills/s & 6.9\,ns \\
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GPU OrderBook --- Apple M4 Max & $\sim$250M fills/s & 4.15\,ns \\
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Settlement (Block-STM, market-sharded) & 2.2M fills/s & --- \\
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Fleet aggregate ($\sim$8--10 GPUs) & $>$1B fills/s & --- \\
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\bottomrule
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\end{tabular}
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\caption{Measured byte-exact \texttt{uint256} matching throughput. A single
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accelerator is dependency-latency-bound at $\sim$100--250M fills/s; the
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$>$1B fills/s aggregate is reached across independent per-book arenas on a
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node fleet, not on one device.}
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\end{table}
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\subsection{Network Saturation}
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At 100Gbps with 60-byte messages:
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\begin{align}
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\text{Max throughput} &= \frac{100 \times 10^9 \text{ bits/sec}}{60 \times 8 \text{ bits/msg}} \\
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&= 208\text{M messages/sec}
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\end{align}
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A single matching node is dependency-latency-bound well below this ceiling
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($\sim$100--250M fills/s); network bandwidth is therefore not the binding
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constraint on a single device, and fleet-level throughput is obtained by
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sharding independent per-book arenas across nodes.
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\section{Comparative Analysis}
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\begin{table}[H]
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\centering
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\begin{tabular}{lrrr}
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\toprule
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\textbf{Exchange} & \textbf{Throughput} & \textbf{Latency} & \textbf{Decentralized} \\
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\midrule
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Uniswap v3 & 1K/s & 12s & Yes \\
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Serum (Solana) & 65K/s & 400ms & Yes \\
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dYdX v4 & 100K/s & 100ms & Partial \\
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Binance (CEX) & 10M/s & 10ms & No \\
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\textbf{LX} & \textbf{104--250M fills/s} & \textbf{4--7\,ns/match} & \textbf{Yes} \\
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\bottomrule
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\end{tabular}
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\caption{LX single-device byte-exact matching throughput versus reported
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exchange figures. The LX column is measured GPU OrderBook matching (GB10 / M4 Max);
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fleet aggregation reaches $>$1B fills/s. The latency column is per-match kernel
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cost, not end-to-end trade confirmation.}
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\end{table}
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\section{Security Analysis}
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\subsection{Byzantine Fault Tolerance}
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Lux Consensus tolerates up to 33\% Byzantine nodes through:
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\begin{itemize}
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\item Adaptive vote thresholds (55\%-65\%)
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\item Quasar dual certificates
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\item DAG structure preventing single points of failure
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\end{itemize}
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\subsection{Quantum Resistance}
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The Corona+BLS hybrid scheme provides:
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\begin{itemize}
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\item 256-bit post-quantum security
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\item Signature aggregation for efficiency
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\item Forward secrecy through ephemeral keys
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\end{itemize}
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\subsection{Economic Security}
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\begin{itemize}
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\item Slashing for misbehavior
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\item Minimum stake requirements (1M LUX)
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\item Reward distribution based on performance
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\end{itemize}
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\section{Future Work}
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\subsection{Near-term (Q1 2025)}
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\begin{itemize}
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\item Persistent memory (Intel Optane) integration
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\item FPGA packet classification
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\item Cross-chain atomic swaps
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\end{itemize}
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\subsection{Medium-term (Q2 2025)}
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\begin{itemize}
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\item Sharded order books for horizontal scaling
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\item Advanced order types (stop, trailing, iceberg)
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\item Market maker incentive program
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\end{itemize}
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\subsection{Long-term (2025+)}
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\begin{itemize}
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\item Full MEV protection
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\item Cross-chain liquidity aggregation
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\item Decentralized price oracles
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\item Regulatory compliance tools
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\end{itemize}
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\section{Conclusion}
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\lxdex{} demonstrates that a decentralized exchange can match orders at
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hardware speed without abandoning settlement-grade correctness. The matching
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kernel sustains 104--126M byte-exact \texttt{uint256} fills/s on an NVIDIA GB10
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(6.9\,ns/match) and $\sim$250M fills/s on an Apple M4 Max (4.15\,ns/match), with
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output identical bit-for-bit to the CPU reference. Because per-book arenas are
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independent, aggregate throughput exceeding one billion fills/s is reached
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across a node fleet rather than on any single device. Matching composes with
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market-sharded Block-STM settlement (2.2M fills/s, CPU/GPU byte-identical commit
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order) and a post-quantum rollup to the Z-Chain.
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As quantum computing threatens existing cryptographic systems, our
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quantum-resistant design ensures long-term security for digital asset trading.
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\section*{Acknowledgments}
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We thank the Lux Industries team for their contributions to the consensus protocol, the open-source community for DPDK and RDMA implementations, and early testers for performance optimization insights.
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\bibliographystyle{plain}
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\bibliography{references}
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\appendix
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\section{Implementation Details}
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\subsection{Build Configuration}
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The system supports multiple build targets:
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\begin{lstlisting}
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# Pure Go (simplest)
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CGO_ENABLED=0 make go-build
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# Hybrid Go/C++ (production)
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CGO_ENABLED=1 make hybrid-build
|
|
|
|
# With DPDK (kernel bypass)
|
|
make dpdk-build
|
|
|
|
# With GPU support
|
|
make gpu-build
|
|
\end{lstlisting}
|
|
|
|
\subsection{Deployment Example}
|
|
|
|
Running a 3-node network:
|
|
|
|
\begin{lstlisting}
|
|
# Node 1
|
|
./xchain-dex --node-id node1 \
|
|
--api-port 8080 \
|
|
--consensus-port 6001 \
|
|
--enable-qchain \
|
|
tcp://node2:6002 tcp://node3:6003
|
|
|
|
# Node 2
|
|
./xchain-dex --node-id node2 \
|
|
--api-port 8081 \
|
|
--consensus-port 6002 \
|
|
--enable-qchain \
|
|
tcp://node1:6001 tcp://node3:6003
|
|
|
|
# Node 3
|
|
./xchain-dex --node-id node3 \
|
|
--api-port 8082 \
|
|
--consensus-port 6003 \
|
|
--enable-qchain \
|
|
tcp://node1:6001 tcp://node2:6002
|
|
\end{lstlisting}
|
|
|
|
\subsection{Performance Tuning}
|
|
|
|
Key optimizations for production:
|
|
|
|
\begin{lstlisting}
|
|
# Disable CPU frequency scaling
|
|
echo performance > /sys/devices/system/cpu/cpu*/cpufreq/scaling_governor
|
|
|
|
# Set network buffers
|
|
sysctl -w net.core.rmem_max=134217728
|
|
sysctl -w net.core.wmem_max=134217728
|
|
|
|
# Pin interrupts to specific cores
|
|
echo 2 > /proc/irq/24/smp_affinity
|
|
|
|
# Use huge pages for DPDK
|
|
echo 1024 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages
|
|
\end{lstlisting}
|
|
|
|
\end{document} |