mirror of
https://github.com/luxfi/blst.git
synced 2026-10-30 17:01:37 +00:00
1032 lines
16 KiB
ArmAsm
1032 lines
16 KiB
ArmAsm
.text
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.globl add_mod_256
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.def add_mod_256; .scl 2; .type 32; .endef
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.p2align 5
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add_mod_256:
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.byte 0xf3,0x0f,0x1e,0xfa
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movq %rdi,8(%rsp)
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movq %rsi,16(%rsp)
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movq %rsp,%r11
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.LSEH_begin_add_mod_256:
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pushq %rbp
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movq %rcx,%rdi
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movq %rdx,%rsi
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movq %r8,%rdx
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movq %r9,%rcx
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pushq %rbx
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subq $8,%rsp
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.LSEH_body_add_mod_256:
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#ifdef __SGX_LVI_HARDENING__
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lfence
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#endif
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movq 0(%rsi),%r8
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movq 8(%rsi),%r9
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movq 16(%rsi),%r10
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movq 24(%rsi),%r11
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.Loaded_a_add_mod_256:
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addq 0(%rdx),%r8
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adcq 8(%rdx),%r9
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movq %r8,%rax
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adcq 16(%rdx),%r10
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movq %r9,%rsi
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adcq 24(%rdx),%r11
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sbbq %rdx,%rdx
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movq %r10,%rbx
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subq 0(%rcx),%r8
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sbbq 8(%rcx),%r9
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sbbq 16(%rcx),%r10
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movq %r11,%rbp
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sbbq 24(%rcx),%r11
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sbbq $0,%rdx
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cmovcq %rax,%r8
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cmovcq %rsi,%r9
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movq %r8,0(%rdi)
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cmovcq %rbx,%r10
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movq %r9,8(%rdi)
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cmovcq %rbp,%r11
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movq %r10,16(%rdi)
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movq %r11,24(%rdi)
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movq 8(%rsp),%rbx
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movq 16(%rsp),%rbp
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leaq 24(%rsp),%rsp
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.LSEH_epilogue_add_mod_256:
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mov 8(%rsp),%rdi
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mov 16(%rsp),%rsi
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#ifdef __SGX_LVI_HARDENING__
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popq %rdx
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lfence
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jmpq *%rdx
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ud2
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#else
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.byte 0xf3,0xc3
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#endif
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.LSEH_end_add_mod_256:
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.globl mul_by_3_mod_256
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.def mul_by_3_mod_256; .scl 2; .type 32; .endef
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.p2align 5
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mul_by_3_mod_256:
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.byte 0xf3,0x0f,0x1e,0xfa
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movq %rdi,8(%rsp)
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movq %rsi,16(%rsp)
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movq %rsp,%r11
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.LSEH_begin_mul_by_3_mod_256:
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pushq %rbp
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movq %rcx,%rdi
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movq %rdx,%rsi
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movq %r8,%rdx
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pushq %rbx
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pushq %r12
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.LSEH_body_mul_by_3_mod_256:
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movq %rdx,%rcx
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#ifdef __SGX_LVI_HARDENING__
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lfence
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#endif
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movq 0(%rsi),%r8
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movq 8(%rsi),%r9
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movq 16(%rsi),%r10
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movq %rsi,%rdx
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movq 24(%rsi),%r11
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call __lshift_mod_256
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movq 0(%rsp),%r12
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jmp .Loaded_a_add_mod_256
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movq 8(%rsp),%rbx
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movq 16(%rsp),%rbp
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leaq 24(%rsp),%rsp
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.LSEH_epilogue_mul_by_3_mod_256:
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mov 8(%rsp),%rdi
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mov 16(%rsp),%rsi
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#ifdef __SGX_LVI_HARDENING__
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popq %rdx
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lfence
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jmpq *%rdx
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ud2
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#else
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.byte 0xf3,0xc3
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#endif
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.LSEH_end_mul_by_3_mod_256:
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.def __lshift_mod_256; .scl 3; .type 32; .endef
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.p2align 5
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__lshift_mod_256:
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.byte 0xf3,0x0f,0x1e,0xfa
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addq %r8,%r8
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adcq %r9,%r9
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movq %r8,%rax
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adcq %r10,%r10
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movq %r9,%rsi
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adcq %r11,%r11
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sbbq %r12,%r12
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movq %r10,%rbx
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subq 0(%rcx),%r8
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sbbq 8(%rcx),%r9
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sbbq 16(%rcx),%r10
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movq %r11,%rbp
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sbbq 24(%rcx),%r11
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sbbq $0,%r12
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cmovcq %rax,%r8
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cmovcq %rsi,%r9
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cmovcq %rbx,%r10
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cmovcq %rbp,%r11
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#ifdef __SGX_LVI_HARDENING__
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popq %rax
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lfence
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jmpq *%rax
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ud2
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#else
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.byte 0xf3,0xc3
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#endif
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.globl lshift_mod_256
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.def lshift_mod_256; .scl 2; .type 32; .endef
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.p2align 5
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lshift_mod_256:
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.byte 0xf3,0x0f,0x1e,0xfa
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movq %rdi,8(%rsp)
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movq %rsi,16(%rsp)
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movq %rsp,%r11
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.LSEH_begin_lshift_mod_256:
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pushq %rbp
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movq %rcx,%rdi
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movq %rdx,%rsi
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movq %r8,%rdx
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movq %r9,%rcx
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pushq %rbx
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pushq %r12
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.LSEH_body_lshift_mod_256:
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#ifdef __SGX_LVI_HARDENING__
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lfence
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#endif
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movq 0(%rsi),%r8
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movq 8(%rsi),%r9
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movq 16(%rsi),%r10
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movq 24(%rsi),%r11
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.Loop_lshift_mod_256:
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call __lshift_mod_256
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decl %edx
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jnz .Loop_lshift_mod_256
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movq %r8,0(%rdi)
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movq %r9,8(%rdi)
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movq %r10,16(%rdi)
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movq %r11,24(%rdi)
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movq 0(%rsp),%r12
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movq 8(%rsp),%rbx
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movq 16(%rsp),%rbp
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leaq 24(%rsp),%rsp
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.LSEH_epilogue_lshift_mod_256:
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mov 8(%rsp),%rdi
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mov 16(%rsp),%rsi
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#ifdef __SGX_LVI_HARDENING__
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popq %rdx
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lfence
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jmpq *%rdx
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ud2
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#else
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.byte 0xf3,0xc3
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#endif
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.LSEH_end_lshift_mod_256:
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.globl rshift_mod_256
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.def rshift_mod_256; .scl 2; .type 32; .endef
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.p2align 5
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rshift_mod_256:
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.byte 0xf3,0x0f,0x1e,0xfa
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movq %rdi,8(%rsp)
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movq %rsi,16(%rsp)
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movq %rsp,%r11
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.LSEH_begin_rshift_mod_256:
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pushq %rbp
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movq %rcx,%rdi
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movq %rdx,%rsi
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movq %r8,%rdx
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movq %r9,%rcx
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pushq %rbx
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subq $8,%rsp
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.LSEH_body_rshift_mod_256:
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#ifdef __SGX_LVI_HARDENING__
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lfence
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#endif
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movq 0(%rsi),%rbp
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movq 8(%rsi),%r9
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movq 16(%rsi),%r10
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movq 24(%rsi),%r11
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.Loop_rshift_mod_256:
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movq %rbp,%r8
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andq $1,%rbp
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movq 0(%rcx),%rax
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negq %rbp
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movq 8(%rcx),%rsi
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movq 16(%rcx),%rbx
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andq %rbp,%rax
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andq %rbp,%rsi
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andq %rbp,%rbx
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andq 24(%rcx),%rbp
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addq %rax,%r8
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adcq %rsi,%r9
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adcq %rbx,%r10
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adcq %rbp,%r11
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sbbq %rax,%rax
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shrq $1,%r8
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movq %r9,%rbp
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shrq $1,%r9
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movq %r10,%rbx
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shrq $1,%r10
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movq %r11,%rsi
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shrq $1,%r11
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shlq $63,%rbp
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shlq $63,%rbx
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orq %r8,%rbp
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shlq $63,%rsi
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orq %rbx,%r9
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shlq $63,%rax
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orq %rsi,%r10
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orq %rax,%r11
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decl %edx
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jnz .Loop_rshift_mod_256
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movq %rbp,0(%rdi)
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movq %r9,8(%rdi)
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movq %r10,16(%rdi)
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movq %r11,24(%rdi)
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movq 8(%rsp),%rbx
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movq 16(%rsp),%rbp
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leaq 24(%rsp),%rsp
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.LSEH_epilogue_rshift_mod_256:
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mov 8(%rsp),%rdi
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mov 16(%rsp),%rsi
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#ifdef __SGX_LVI_HARDENING__
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popq %rdx
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lfence
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jmpq *%rdx
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ud2
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#else
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.byte 0xf3,0xc3
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#endif
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.LSEH_end_rshift_mod_256:
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.globl cneg_mod_256
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.def cneg_mod_256; .scl 2; .type 32; .endef
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.p2align 5
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cneg_mod_256:
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.byte 0xf3,0x0f,0x1e,0xfa
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movq %rdi,8(%rsp)
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movq %rsi,16(%rsp)
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movq %rsp,%r11
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.LSEH_begin_cneg_mod_256:
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pushq %rbp
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movq %rcx,%rdi
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movq %rdx,%rsi
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movq %r8,%rdx
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movq %r9,%rcx
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pushq %rbx
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pushq %r12
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.LSEH_body_cneg_mod_256:
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#ifdef __SGX_LVI_HARDENING__
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lfence
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#endif
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movq 0(%rsi),%r12
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movq 8(%rsi),%r9
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movq 16(%rsi),%r10
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movq %r12,%r8
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movq 24(%rsi),%r11
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orq %r9,%r12
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orq %r10,%r12
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orq %r11,%r12
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movq $-1,%rbp
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movq 0(%rcx),%rax
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cmovnzq %rbp,%r12
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movq 8(%rcx),%rsi
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movq 16(%rcx),%rbx
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andq %r12,%rax
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movq 24(%rcx),%rbp
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andq %r12,%rsi
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andq %r12,%rbx
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andq %r12,%rbp
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subq %r8,%rax
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sbbq %r9,%rsi
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sbbq %r10,%rbx
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sbbq %r11,%rbp
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orq %rdx,%rdx
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cmovzq %r8,%rax
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cmovzq %r9,%rsi
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movq %rax,0(%rdi)
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cmovzq %r10,%rbx
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movq %rsi,8(%rdi)
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cmovzq %r11,%rbp
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movq %rbx,16(%rdi)
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movq %rbp,24(%rdi)
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movq 0(%rsp),%r12
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movq 8(%rsp),%rbx
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movq 16(%rsp),%rbp
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leaq 24(%rsp),%rsp
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.LSEH_epilogue_cneg_mod_256:
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mov 8(%rsp),%rdi
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mov 16(%rsp),%rsi
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#ifdef __SGX_LVI_HARDENING__
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popq %rdx
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lfence
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jmpq *%rdx
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ud2
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#else
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.byte 0xf3,0xc3
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#endif
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.LSEH_end_cneg_mod_256:
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.globl sub_mod_256
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.def sub_mod_256; .scl 2; .type 32; .endef
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.p2align 5
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sub_mod_256:
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.byte 0xf3,0x0f,0x1e,0xfa
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movq %rdi,8(%rsp)
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movq %rsi,16(%rsp)
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movq %rsp,%r11
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.LSEH_begin_sub_mod_256:
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pushq %rbp
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movq %rcx,%rdi
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movq %rdx,%rsi
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movq %r8,%rdx
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movq %r9,%rcx
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pushq %rbx
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subq $8,%rsp
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.LSEH_body_sub_mod_256:
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#ifdef __SGX_LVI_HARDENING__
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lfence
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#endif
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movq 0(%rsi),%r8
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movq 8(%rsi),%r9
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movq 16(%rsi),%r10
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movq 24(%rsi),%r11
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subq 0(%rdx),%r8
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movq 0(%rcx),%rax
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sbbq 8(%rdx),%r9
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movq 8(%rcx),%rsi
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sbbq 16(%rdx),%r10
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movq 16(%rcx),%rbx
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sbbq 24(%rdx),%r11
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movq 24(%rcx),%rbp
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sbbq %rdx,%rdx
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andq %rdx,%rax
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andq %rdx,%rsi
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andq %rdx,%rbx
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andq %rdx,%rbp
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addq %rax,%r8
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adcq %rsi,%r9
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movq %r8,0(%rdi)
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adcq %rbx,%r10
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movq %r9,8(%rdi)
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adcq %rbp,%r11
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movq %r10,16(%rdi)
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movq %r11,24(%rdi)
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movq 8(%rsp),%rbx
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movq 16(%rsp),%rbp
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leaq 24(%rsp),%rsp
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.LSEH_epilogue_sub_mod_256:
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mov 8(%rsp),%rdi
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mov 16(%rsp),%rsi
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#ifdef __SGX_LVI_HARDENING__
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popq %rdx
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lfence
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jmpq *%rdx
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ud2
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#else
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.byte 0xf3,0xc3
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#endif
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.LSEH_end_sub_mod_256:
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.globl check_mod_256
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.def check_mod_256; .scl 2; .type 32; .endef
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.p2align 5
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check_mod_256:
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.byte 0xf3,0x0f,0x1e,0xfa
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movq %rdi,8(%rsp)
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movq %rsi,16(%rsp)
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movq %rsp,%r11
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.LSEH_begin_check_mod_256:
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movq %rcx,%rdi
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movq %rdx,%rsi
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#ifdef __SGX_LVI_HARDENING__
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lfence
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#endif
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movq 0(%rdi),%rax
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movq 8(%rdi),%r9
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movq 16(%rdi),%r10
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movq 24(%rdi),%r11
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movq %rax,%r8
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orq %r9,%rax
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orq %r10,%rax
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orq %r11,%rax
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subq 0(%rsi),%r8
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sbbq 8(%rsi),%r9
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sbbq 16(%rsi),%r10
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sbbq 24(%rsi),%r11
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sbbq %rsi,%rsi
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movq $1,%rdx
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cmpq $0,%rax
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cmovneq %rdx,%rax
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andq %rsi,%rax
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.LSEH_epilogue_check_mod_256:
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mov 8(%rsp),%rdi
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mov 16(%rsp),%rsi
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#ifdef __SGX_LVI_HARDENING__
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popq %rdx
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lfence
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jmpq *%rdx
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ud2
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#else
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.byte 0xf3,0xc3
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#endif
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.LSEH_end_check_mod_256:
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|
|
|
|
.globl add_n_check_mod_256
|
|
|
|
.def add_n_check_mod_256; .scl 2; .type 32; .endef
|
|
.p2align 5
|
|
add_n_check_mod_256:
|
|
.byte 0xf3,0x0f,0x1e,0xfa
|
|
movq %rdi,8(%rsp)
|
|
movq %rsi,16(%rsp)
|
|
movq %rsp,%r11
|
|
.LSEH_begin_add_n_check_mod_256:
|
|
|
|
|
|
pushq %rbp
|
|
|
|
movq %rcx,%rdi
|
|
movq %rdx,%rsi
|
|
movq %r8,%rdx
|
|
movq %r9,%rcx
|
|
pushq %rbx
|
|
|
|
subq $8,%rsp
|
|
|
|
.LSEH_body_add_n_check_mod_256:
|
|
|
|
|
|
#ifdef __SGX_LVI_HARDENING__
|
|
lfence
|
|
#endif
|
|
movq 0(%rsi),%r8
|
|
movq 8(%rsi),%r9
|
|
movq 16(%rsi),%r10
|
|
movq 24(%rsi),%r11
|
|
|
|
addq 0(%rdx),%r8
|
|
adcq 8(%rdx),%r9
|
|
movq %r8,%rax
|
|
adcq 16(%rdx),%r10
|
|
movq %r9,%rsi
|
|
adcq 24(%rdx),%r11
|
|
sbbq %rdx,%rdx
|
|
|
|
movq %r10,%rbx
|
|
subq 0(%rcx),%r8
|
|
sbbq 8(%rcx),%r9
|
|
sbbq 16(%rcx),%r10
|
|
movq %r11,%rbp
|
|
sbbq 24(%rcx),%r11
|
|
sbbq $0,%rdx
|
|
|
|
cmovcq %rax,%r8
|
|
cmovcq %rsi,%r9
|
|
movq %r8,0(%rdi)
|
|
cmovcq %rbx,%r10
|
|
movq %r9,8(%rdi)
|
|
cmovcq %rbp,%r11
|
|
movq %r10,16(%rdi)
|
|
movq %r11,24(%rdi)
|
|
|
|
orq %r9,%r8
|
|
orq %r11,%r10
|
|
orq %r10,%r8
|
|
movq $1,%rax
|
|
cmovzq %r8,%rax
|
|
|
|
movq 8(%rsp),%rbx
|
|
|
|
movq 16(%rsp),%rbp
|
|
|
|
leaq 24(%rsp),%rsp
|
|
|
|
.LSEH_epilogue_add_n_check_mod_256:
|
|
mov 8(%rsp),%rdi
|
|
mov 16(%rsp),%rsi
|
|
|
|
|
|
#ifdef __SGX_LVI_HARDENING__
|
|
popq %rdx
|
|
lfence
|
|
jmpq *%rdx
|
|
ud2
|
|
#else
|
|
.byte 0xf3,0xc3
|
|
#endif
|
|
|
|
.LSEH_end_add_n_check_mod_256:
|
|
|
|
|
|
.globl sub_n_check_mod_256
|
|
|
|
.def sub_n_check_mod_256; .scl 2; .type 32; .endef
|
|
.p2align 5
|
|
sub_n_check_mod_256:
|
|
.byte 0xf3,0x0f,0x1e,0xfa
|
|
movq %rdi,8(%rsp)
|
|
movq %rsi,16(%rsp)
|
|
movq %rsp,%r11
|
|
.LSEH_begin_sub_n_check_mod_256:
|
|
|
|
|
|
pushq %rbp
|
|
|
|
movq %rcx,%rdi
|
|
movq %rdx,%rsi
|
|
movq %r8,%rdx
|
|
movq %r9,%rcx
|
|
pushq %rbx
|
|
|
|
subq $8,%rsp
|
|
|
|
.LSEH_body_sub_n_check_mod_256:
|
|
|
|
|
|
#ifdef __SGX_LVI_HARDENING__
|
|
lfence
|
|
#endif
|
|
movq 0(%rsi),%r8
|
|
movq 8(%rsi),%r9
|
|
movq 16(%rsi),%r10
|
|
movq 24(%rsi),%r11
|
|
|
|
subq 0(%rdx),%r8
|
|
movq 0(%rcx),%rax
|
|
sbbq 8(%rdx),%r9
|
|
movq 8(%rcx),%rsi
|
|
sbbq 16(%rdx),%r10
|
|
movq 16(%rcx),%rbx
|
|
sbbq 24(%rdx),%r11
|
|
movq 24(%rcx),%rbp
|
|
sbbq %rdx,%rdx
|
|
|
|
andq %rdx,%rax
|
|
andq %rdx,%rsi
|
|
andq %rdx,%rbx
|
|
andq %rdx,%rbp
|
|
|
|
addq %rax,%r8
|
|
adcq %rsi,%r9
|
|
movq %r8,0(%rdi)
|
|
adcq %rbx,%r10
|
|
movq %r9,8(%rdi)
|
|
adcq %rbp,%r11
|
|
movq %r10,16(%rdi)
|
|
movq %r11,24(%rdi)
|
|
|
|
orq %r9,%r8
|
|
orq %r11,%r10
|
|
orq %r10,%r8
|
|
movq $1,%rax
|
|
cmovzq %r8,%rax
|
|
|
|
movq 8(%rsp),%rbx
|
|
|
|
movq 16(%rsp),%rbp
|
|
|
|
leaq 24(%rsp),%rsp
|
|
|
|
.LSEH_epilogue_sub_n_check_mod_256:
|
|
mov 8(%rsp),%rdi
|
|
mov 16(%rsp),%rsi
|
|
|
|
|
|
#ifdef __SGX_LVI_HARDENING__
|
|
popq %rdx
|
|
lfence
|
|
jmpq *%rdx
|
|
ud2
|
|
#else
|
|
.byte 0xf3,0xc3
|
|
#endif
|
|
|
|
.LSEH_end_sub_n_check_mod_256:
|
|
.section .pdata
|
|
.p2align 2
|
|
.rva .LSEH_begin_add_mod_256
|
|
.rva .LSEH_body_add_mod_256
|
|
.rva .LSEH_info_add_mod_256_prologue
|
|
|
|
.rva .LSEH_body_add_mod_256
|
|
.rva .LSEH_epilogue_add_mod_256
|
|
.rva .LSEH_info_add_mod_256_body
|
|
|
|
.rva .LSEH_epilogue_add_mod_256
|
|
.rva .LSEH_end_add_mod_256
|
|
.rva .LSEH_info_add_mod_256_epilogue
|
|
|
|
.rva .LSEH_begin_mul_by_3_mod_256
|
|
.rva .LSEH_body_mul_by_3_mod_256
|
|
.rva .LSEH_info_mul_by_3_mod_256_prologue
|
|
|
|
.rva .LSEH_body_mul_by_3_mod_256
|
|
.rva .LSEH_epilogue_mul_by_3_mod_256
|
|
.rva .LSEH_info_mul_by_3_mod_256_body
|
|
|
|
.rva .LSEH_epilogue_mul_by_3_mod_256
|
|
.rva .LSEH_end_mul_by_3_mod_256
|
|
.rva .LSEH_info_mul_by_3_mod_256_epilogue
|
|
|
|
.rva .LSEH_begin_lshift_mod_256
|
|
.rva .LSEH_body_lshift_mod_256
|
|
.rva .LSEH_info_lshift_mod_256_prologue
|
|
|
|
.rva .LSEH_body_lshift_mod_256
|
|
.rva .LSEH_epilogue_lshift_mod_256
|
|
.rva .LSEH_info_lshift_mod_256_body
|
|
|
|
.rva .LSEH_epilogue_lshift_mod_256
|
|
.rva .LSEH_end_lshift_mod_256
|
|
.rva .LSEH_info_lshift_mod_256_epilogue
|
|
|
|
.rva .LSEH_begin_rshift_mod_256
|
|
.rva .LSEH_body_rshift_mod_256
|
|
.rva .LSEH_info_rshift_mod_256_prologue
|
|
|
|
.rva .LSEH_body_rshift_mod_256
|
|
.rva .LSEH_epilogue_rshift_mod_256
|
|
.rva .LSEH_info_rshift_mod_256_body
|
|
|
|
.rva .LSEH_epilogue_rshift_mod_256
|
|
.rva .LSEH_end_rshift_mod_256
|
|
.rva .LSEH_info_rshift_mod_256_epilogue
|
|
|
|
.rva .LSEH_begin_cneg_mod_256
|
|
.rva .LSEH_body_cneg_mod_256
|
|
.rva .LSEH_info_cneg_mod_256_prologue
|
|
|
|
.rva .LSEH_body_cneg_mod_256
|
|
.rva .LSEH_epilogue_cneg_mod_256
|
|
.rva .LSEH_info_cneg_mod_256_body
|
|
|
|
.rva .LSEH_epilogue_cneg_mod_256
|
|
.rva .LSEH_end_cneg_mod_256
|
|
.rva .LSEH_info_cneg_mod_256_epilogue
|
|
|
|
.rva .LSEH_begin_sub_mod_256
|
|
.rva .LSEH_body_sub_mod_256
|
|
.rva .LSEH_info_sub_mod_256_prologue
|
|
|
|
.rva .LSEH_body_sub_mod_256
|
|
.rva .LSEH_epilogue_sub_mod_256
|
|
.rva .LSEH_info_sub_mod_256_body
|
|
|
|
.rva .LSEH_epilogue_sub_mod_256
|
|
.rva .LSEH_end_sub_mod_256
|
|
.rva .LSEH_info_sub_mod_256_epilogue
|
|
|
|
.rva .LSEH_epilogue_check_mod_256
|
|
.rva .LSEH_end_check_mod_256
|
|
.rva .LSEH_info_check_mod_256_epilogue
|
|
|
|
.rva .LSEH_begin_add_n_check_mod_256
|
|
.rva .LSEH_body_add_n_check_mod_256
|
|
.rva .LSEH_info_add_n_check_mod_256_prologue
|
|
|
|
.rva .LSEH_body_add_n_check_mod_256
|
|
.rva .LSEH_epilogue_add_n_check_mod_256
|
|
.rva .LSEH_info_add_n_check_mod_256_body
|
|
|
|
.rva .LSEH_epilogue_add_n_check_mod_256
|
|
.rva .LSEH_end_add_n_check_mod_256
|
|
.rva .LSEH_info_add_n_check_mod_256_epilogue
|
|
|
|
.rva .LSEH_begin_sub_n_check_mod_256
|
|
.rva .LSEH_body_sub_n_check_mod_256
|
|
.rva .LSEH_info_sub_n_check_mod_256_prologue
|
|
|
|
.rva .LSEH_body_sub_n_check_mod_256
|
|
.rva .LSEH_epilogue_sub_n_check_mod_256
|
|
.rva .LSEH_info_sub_n_check_mod_256_body
|
|
|
|
.rva .LSEH_epilogue_sub_n_check_mod_256
|
|
.rva .LSEH_end_sub_n_check_mod_256
|
|
.rva .LSEH_info_sub_n_check_mod_256_epilogue
|
|
|
|
.section .xdata
|
|
.p2align 3
|
|
.LSEH_info_add_mod_256_prologue:
|
|
.byte 1,0,5,0x0b
|
|
.byte 0,0x74,1,0
|
|
.byte 0,0x64,2,0
|
|
.byte 0,0xb3
|
|
.byte 0,0
|
|
.long 0,0
|
|
.LSEH_info_add_mod_256_body:
|
|
.byte 1,0,9,0
|
|
.byte 0x00,0x34,0x01,0x00
|
|
.byte 0x00,0x54,0x02,0x00
|
|
.byte 0x00,0x74,0x04,0x00
|
|
.byte 0x00,0x64,0x05,0x00
|
|
.byte 0x00,0x22
|
|
.byte 0x00,0x00,0x00,0x00,0x00,0x00
|
|
.byte 0x00,0x00,0x00,0x00
|
|
.LSEH_info_add_mod_256_epilogue:
|
|
.byte 1,0,4,0
|
|
.byte 0x00,0x74,0x01,0x00
|
|
.byte 0x00,0x64,0x02,0x00
|
|
.byte 0x00,0x00,0x00,0x00
|
|
|
|
.LSEH_info_mul_by_3_mod_256_prologue:
|
|
.byte 1,0,5,0x0b
|
|
.byte 0,0x74,1,0
|
|
.byte 0,0x64,2,0
|
|
.byte 0,0xb3
|
|
.byte 0,0
|
|
.long 0,0
|
|
.LSEH_info_mul_by_3_mod_256_body:
|
|
.byte 1,0,11,0
|
|
.byte 0x00,0xc4,0x00,0x00
|
|
.byte 0x00,0x34,0x01,0x00
|
|
.byte 0x00,0x54,0x02,0x00
|
|
.byte 0x00,0x74,0x04,0x00
|
|
.byte 0x00,0x64,0x05,0x00
|
|
.byte 0x00,0x22
|
|
.byte 0x00,0x00,0x00,0x00,0x00,0x00
|
|
.LSEH_info_mul_by_3_mod_256_epilogue:
|
|
.byte 1,0,4,0
|
|
.byte 0x00,0x74,0x01,0x00
|
|
.byte 0x00,0x64,0x02,0x00
|
|
.byte 0x00,0x00,0x00,0x00
|
|
|
|
.LSEH_info_lshift_mod_256_prologue:
|
|
.byte 1,0,5,0x0b
|
|
.byte 0,0x74,1,0
|
|
.byte 0,0x64,2,0
|
|
.byte 0,0xb3
|
|
.byte 0,0
|
|
.long 0,0
|
|
.LSEH_info_lshift_mod_256_body:
|
|
.byte 1,0,11,0
|
|
.byte 0x00,0xc4,0x00,0x00
|
|
.byte 0x00,0x34,0x01,0x00
|
|
.byte 0x00,0x54,0x02,0x00
|
|
.byte 0x00,0x74,0x04,0x00
|
|
.byte 0x00,0x64,0x05,0x00
|
|
.byte 0x00,0x22
|
|
.byte 0x00,0x00,0x00,0x00,0x00,0x00
|
|
.LSEH_info_lshift_mod_256_epilogue:
|
|
.byte 1,0,4,0
|
|
.byte 0x00,0x74,0x01,0x00
|
|
.byte 0x00,0x64,0x02,0x00
|
|
.byte 0x00,0x00,0x00,0x00
|
|
|
|
.LSEH_info_rshift_mod_256_prologue:
|
|
.byte 1,0,5,0x0b
|
|
.byte 0,0x74,1,0
|
|
.byte 0,0x64,2,0
|
|
.byte 0,0xb3
|
|
.byte 0,0
|
|
.long 0,0
|
|
.LSEH_info_rshift_mod_256_body:
|
|
.byte 1,0,9,0
|
|
.byte 0x00,0x34,0x01,0x00
|
|
.byte 0x00,0x54,0x02,0x00
|
|
.byte 0x00,0x74,0x04,0x00
|
|
.byte 0x00,0x64,0x05,0x00
|
|
.byte 0x00,0x22
|
|
.byte 0x00,0x00,0x00,0x00,0x00,0x00
|
|
.byte 0x00,0x00,0x00,0x00
|
|
.LSEH_info_rshift_mod_256_epilogue:
|
|
.byte 1,0,4,0
|
|
.byte 0x00,0x74,0x01,0x00
|
|
.byte 0x00,0x64,0x02,0x00
|
|
.byte 0x00,0x00,0x00,0x00
|
|
|
|
.LSEH_info_cneg_mod_256_prologue:
|
|
.byte 1,0,5,0x0b
|
|
.byte 0,0x74,1,0
|
|
.byte 0,0x64,2,0
|
|
.byte 0,0xb3
|
|
.byte 0,0
|
|
.long 0,0
|
|
.LSEH_info_cneg_mod_256_body:
|
|
.byte 1,0,11,0
|
|
.byte 0x00,0xc4,0x00,0x00
|
|
.byte 0x00,0x34,0x01,0x00
|
|
.byte 0x00,0x54,0x02,0x00
|
|
.byte 0x00,0x74,0x04,0x00
|
|
.byte 0x00,0x64,0x05,0x00
|
|
.byte 0x00,0x22
|
|
.byte 0x00,0x00,0x00,0x00,0x00,0x00
|
|
.LSEH_info_cneg_mod_256_epilogue:
|
|
.byte 1,0,4,0
|
|
.byte 0x00,0x74,0x01,0x00
|
|
.byte 0x00,0x64,0x02,0x00
|
|
.byte 0x00,0x00,0x00,0x00
|
|
|
|
.LSEH_info_sub_mod_256_prologue:
|
|
.byte 1,0,5,0x0b
|
|
.byte 0,0x74,1,0
|
|
.byte 0,0x64,2,0
|
|
.byte 0,0xb3
|
|
.byte 0,0
|
|
.long 0,0
|
|
.LSEH_info_sub_mod_256_body:
|
|
.byte 1,0,9,0
|
|
.byte 0x00,0x34,0x01,0x00
|
|
.byte 0x00,0x54,0x02,0x00
|
|
.byte 0x00,0x74,0x04,0x00
|
|
.byte 0x00,0x64,0x05,0x00
|
|
.byte 0x00,0x22
|
|
.byte 0x00,0x00,0x00,0x00,0x00,0x00
|
|
.byte 0x00,0x00,0x00,0x00
|
|
.LSEH_info_sub_mod_256_epilogue:
|
|
.byte 1,0,4,0
|
|
.byte 0x00,0x74,0x01,0x00
|
|
.byte 0x00,0x64,0x02,0x00
|
|
.byte 0x00,0x00,0x00,0x00
|
|
|
|
.LSEH_info_check_mod_256_epilogue:
|
|
.byte 1,0,4,0
|
|
.byte 0x00,0x74,0x01,0x00
|
|
.byte 0x00,0x64,0x02,0x00
|
|
.byte 0x00,0x00,0x00,0x00
|
|
|
|
.LSEH_info_add_n_check_mod_256_prologue:
|
|
.byte 1,0,5,0x0b
|
|
.byte 0,0x74,1,0
|
|
.byte 0,0x64,2,0
|
|
.byte 0,0xb3
|
|
.byte 0,0
|
|
.long 0,0
|
|
.LSEH_info_add_n_check_mod_256_body:
|
|
.byte 1,0,9,0
|
|
.byte 0x00,0x34,0x01,0x00
|
|
.byte 0x00,0x54,0x02,0x00
|
|
.byte 0x00,0x74,0x04,0x00
|
|
.byte 0x00,0x64,0x05,0x00
|
|
.byte 0x00,0x22
|
|
.byte 0x00,0x00,0x00,0x00,0x00,0x00
|
|
.byte 0x00,0x00,0x00,0x00
|
|
.LSEH_info_add_n_check_mod_256_epilogue:
|
|
.byte 1,0,4,0
|
|
.byte 0x00,0x74,0x01,0x00
|
|
.byte 0x00,0x64,0x02,0x00
|
|
.byte 0x00,0x00,0x00,0x00
|
|
|
|
.LSEH_info_sub_n_check_mod_256_prologue:
|
|
.byte 1,0,5,0x0b
|
|
.byte 0,0x74,1,0
|
|
.byte 0,0x64,2,0
|
|
.byte 0,0xb3
|
|
.byte 0,0
|
|
.long 0,0
|
|
.LSEH_info_sub_n_check_mod_256_body:
|
|
.byte 1,0,9,0
|
|
.byte 0x00,0x34,0x01,0x00
|
|
.byte 0x00,0x54,0x02,0x00
|
|
.byte 0x00,0x74,0x04,0x00
|
|
.byte 0x00,0x64,0x05,0x00
|
|
.byte 0x00,0x22
|
|
.byte 0x00,0x00,0x00,0x00,0x00,0x00
|
|
.byte 0x00,0x00,0x00,0x00
|
|
.LSEH_info_sub_n_check_mod_256_epilogue:
|
|
.byte 1,0,4,0
|
|
.byte 0x00,0x74,0x01,0x00
|
|
.byte 0x00,0x64,0x02,0x00
|
|
.byte 0x00,0x00,0x00,0x00
|
|
|