mirror of
https://github.com/luxfi/blst.git
synced 2026-11-02 10:07:52 +00:00
553 lines
8.0 KiB
ArmAsm
553 lines
8.0 KiB
ArmAsm
.text
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.globl ct_is_square_mod_384
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.def ct_is_square_mod_384; .scl 2; .type 32; .endef
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.p2align 5
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ct_is_square_mod_384:
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.byte 0xf3,0x0f,0x1e,0xfa
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movq %rdi,8(%rsp)
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movq %rsi,16(%rsp)
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movq %rsp,%r11
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.LSEH_begin_ct_is_square_mod_384:
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pushq %rbp
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movq %rcx,%rdi
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movq %rdx,%rsi
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pushq %rbx
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pushq %r12
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pushq %r13
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pushq %r14
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pushq %r15
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subq $536,%rsp
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.LSEH_body_ct_is_square_mod_384:
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leaq 24+255(%rsp),%rax
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andq $-256,%rax
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#ifdef __SGX_LVI_HARDENING__
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lfence
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#endif
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movq 0(%rdi),%r8
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movq 8(%rdi),%r9
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movq 16(%rdi),%r10
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movq 24(%rdi),%r11
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movq 32(%rdi),%r12
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movq 40(%rdi),%r13
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movq 0(%rsi),%r14
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movq 8(%rsi),%r15
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movq 16(%rsi),%rbx
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movq 24(%rsi),%rcx
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movq 32(%rsi),%rdx
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movq 40(%rsi),%rdi
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movq %rax,%rsi
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movq %r8,0(%rax)
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movq %r9,8(%rax)
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movq %r10,16(%rax)
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movq %r11,24(%rax)
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movq %r12,32(%rax)
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movq %r13,40(%rax)
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movq %r14,48(%rax)
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movq %r15,56(%rax)
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movq %rbx,64(%rax)
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movq %rcx,72(%rax)
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movq %rdx,80(%rax)
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movq %rdi,88(%rax)
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xorq %rbp,%rbp
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movl $24,%ecx
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jmp .Loop_is_square
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.p2align 5
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.Loop_is_square:
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movl %ecx,16(%rsp)
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call __ab_approximation_30
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movq %rax,0(%rsp)
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movq %rbx,8(%rsp)
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movq $128+48,%rdi
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xorq %rsi,%rdi
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call __smulq_384_n_shift_by_30
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movq 0(%rsp),%rdx
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movq 8(%rsp),%rcx
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leaq -48(%rdi),%rdi
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call __smulq_384_n_shift_by_30
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movl 16(%rsp),%ecx
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xorq $128,%rsi
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andq 48(%rdi),%r14
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shrq $1,%r14
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addq %r14,%rbp
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subl $1,%ecx
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jnz .Loop_is_square
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movq 48(%rsi),%r9
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call __inner_loop_48
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movq $1,%rax
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andq %rbp,%rax
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xorq $1,%rax
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leaq 536(%rsp),%r8
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movq 0(%r8),%r15
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movq 8(%r8),%r14
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movq 16(%r8),%r13
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movq 24(%r8),%r12
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movq 32(%r8),%rbx
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movq 40(%r8),%rbp
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leaq 48(%r8),%rsp
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.LSEH_epilogue_ct_is_square_mod_384:
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mov 8(%rsp),%rdi
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mov 16(%rsp),%rsi
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#ifdef __SGX_LVI_HARDENING__
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popq %rdx
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lfence
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jmpq *%rdx
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ud2
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#else
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.byte 0xf3,0xc3
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#endif
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.LSEH_end_ct_is_square_mod_384:
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.def __smulq_384_n_shift_by_30; .scl 3; .type 32; .endef
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.p2align 5
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__smulq_384_n_shift_by_30:
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.byte 0xf3,0x0f,0x1e,0xfa
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movq 0(%rsi),%r8
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movq 8(%rsi),%r9
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movq 16(%rsi),%r10
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movq 24(%rsi),%r11
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movq 32(%rsi),%r12
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movq 40(%rsi),%r13
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movq %rdx,%rbx
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sarq $63,%rdx
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xorq %rax,%rax
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subq %rdx,%rax
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xorq %rdx,%rbx
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addq %rax,%rbx
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xorq %rdx,%r8
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xorq %rdx,%r9
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xorq %rdx,%r10
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xorq %rdx,%r11
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xorq %rdx,%r12
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xorq %rdx,%r13
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addq %r8,%rax
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adcq $0,%r9
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adcq $0,%r10
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adcq $0,%r11
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adcq $0,%r12
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adcq $0,%r13
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movq %rdx,%r14
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andq %rbx,%r14
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mulq %rbx
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movq %rax,%r8
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movq %r9,%rax
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movq %rdx,%r9
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mulq %rbx
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addq %rax,%r9
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movq %r10,%rax
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adcq $0,%rdx
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movq %rdx,%r10
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mulq %rbx
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addq %rax,%r10
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movq %r11,%rax
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adcq $0,%rdx
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movq %rdx,%r11
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mulq %rbx
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addq %rax,%r11
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movq %r12,%rax
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adcq $0,%rdx
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movq %rdx,%r12
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mulq %rbx
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addq %rax,%r12
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movq %r13,%rax
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adcq $0,%rdx
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movq %rdx,%r13
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negq %r14
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mulq %rbx
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addq %rax,%r13
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adcq %rdx,%r14
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leaq 48(%rsi),%rsi
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movq %rcx,%rdx
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movq %r8,0(%rdi)
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movq %r9,8(%rdi)
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movq %r10,16(%rdi)
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movq %r11,24(%rdi)
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movq %r12,32(%rdi)
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movq %r13,40(%rdi)
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movq 0(%rsi),%r8
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movq 8(%rsi),%r9
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movq 16(%rsi),%r10
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movq 24(%rsi),%r11
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movq 32(%rsi),%r12
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movq 40(%rsi),%r13
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movq %rdx,%rbx
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sarq $63,%rdx
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xorq %rax,%rax
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subq %rdx,%rax
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xorq %rdx,%rbx
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addq %rax,%rbx
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xorq %rdx,%r8
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xorq %rdx,%r9
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xorq %rdx,%r10
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xorq %rdx,%r11
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xorq %rdx,%r12
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xorq %rdx,%r13
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addq %r8,%rax
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adcq $0,%r9
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adcq $0,%r10
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adcq $0,%r11
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adcq $0,%r12
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adcq $0,%r13
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movq %rdx,%r15
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andq %rbx,%r15
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mulq %rbx
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movq %rax,%r8
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movq %r9,%rax
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movq %rdx,%r9
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mulq %rbx
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addq %rax,%r9
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movq %r10,%rax
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adcq $0,%rdx
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movq %rdx,%r10
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mulq %rbx
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addq %rax,%r10
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movq %r11,%rax
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adcq $0,%rdx
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movq %rdx,%r11
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mulq %rbx
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addq %rax,%r11
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movq %r12,%rax
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adcq $0,%rdx
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movq %rdx,%r12
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mulq %rbx
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addq %rax,%r12
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movq %r13,%rax
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adcq $0,%rdx
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movq %rdx,%r13
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negq %r15
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mulq %rbx
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addq %rax,%r13
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adcq %rdx,%r15
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leaq -48(%rsi),%rsi
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addq 0(%rdi),%r8
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adcq 8(%rdi),%r9
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adcq 16(%rdi),%r10
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adcq 24(%rdi),%r11
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adcq 32(%rdi),%r12
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adcq 40(%rdi),%r13
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adcq %r15,%r14
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shrdq $30,%r9,%r8
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shrdq $30,%r10,%r9
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shrdq $30,%r11,%r10
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shrdq $30,%r12,%r11
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shrdq $30,%r13,%r12
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shrdq $30,%r14,%r13
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sarq $63,%r14
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xorq %rbx,%rbx
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subq %r14,%rbx
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xorq %r14,%r8
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xorq %r14,%r9
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xorq %r14,%r10
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xorq %r14,%r11
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xorq %r14,%r12
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xorq %r14,%r13
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addq %rbx,%r8
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adcq $0,%r9
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adcq $0,%r10
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adcq $0,%r11
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adcq $0,%r12
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adcq $0,%r13
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movq %r8,0(%rdi)
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movq %r9,8(%rdi)
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movq %r10,16(%rdi)
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movq %r11,24(%rdi)
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movq %r12,32(%rdi)
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movq %r13,40(%rdi)
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#ifdef __SGX_LVI_HARDENING__
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popq %rdx
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lfence
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jmpq *%rdx
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ud2
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#else
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.byte 0xf3,0xc3
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#endif
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.def __ab_approximation_30; .scl 3; .type 32; .endef
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.p2align 5
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__ab_approximation_30:
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.byte 0xf3,0x0f,0x1e,0xfa
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movq 88(%rsi),%rbx
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movq 80(%rsi),%r15
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movq 72(%rsi),%r14
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movq %r13,%rax
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orq %rbx,%rax
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cmovzq %r12,%r13
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cmovzq %r15,%rbx
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cmovzq %r11,%r12
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movq 64(%rsi),%r11
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cmovzq %r14,%r15
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movq %r13,%rax
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orq %rbx,%rax
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cmovzq %r12,%r13
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cmovzq %r15,%rbx
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cmovzq %r10,%r12
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movq 56(%rsi),%r10
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cmovzq %r11,%r15
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movq %r13,%rax
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orq %rbx,%rax
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cmovzq %r12,%r13
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cmovzq %r15,%rbx
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cmovzq %r9,%r12
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movq 48(%rsi),%r9
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cmovzq %r10,%r15
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movq %r13,%rax
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orq %rbx,%rax
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cmovzq %r12,%r13
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cmovzq %r15,%rbx
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cmovzq %r8,%r12
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cmovzq %r9,%r15
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movq %r13,%rax
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orq %rbx,%rax
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bsrq %rax,%rcx
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leaq 1(%rcx),%rcx
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cmovzq %r8,%r13
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cmovzq %r9,%rbx
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cmovzq %rax,%rcx
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negq %rcx
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shldq %cl,%r12,%r13
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shldq %cl,%r15,%rbx
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movq $0xFFFFFFFF00000000,%rax
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movl %r8d,%r8d
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movl %r9d,%r9d
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andq %rax,%r13
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andq %rax,%rbx
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orq %r13,%r8
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orq %rbx,%r9
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jmp __inner_loop_30
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#ifdef __SGX_LVI_HARDENING__
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popq %rdx
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lfence
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jmpq *%rdx
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ud2
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#else
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.byte 0xf3,0xc3
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#endif
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.def __inner_loop_30; .scl 3; .type 32; .endef
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.p2align 5
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__inner_loop_30:
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.byte 0xf3,0x0f,0x1e,0xfa
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movq $0x7FFFFFFF80000000,%rbx
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movq $0x800000007FFFFFFF,%rcx
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leaq -1(%rbx),%r15
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movl $30,%edi
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.Loop_30:
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movq %r8,%rax
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andq %r9,%rax
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shrq $1,%rax
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cmpq %r9,%r8
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movq %r8,%r10
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movq %r9,%r11
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leaq (%rax,%rbp,1),%rax
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movq %rbx,%r12
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movq %rcx,%r13
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movq %rbp,%r14
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cmovbq %r9,%r8
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cmovbq %r10,%r9
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cmovbq %rcx,%rbx
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cmovbq %r12,%rcx
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cmovbq %rax,%rbp
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subq %r9,%r8
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subq %rcx,%rbx
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addq %r15,%rbx
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testq $1,%r10
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cmovzq %r10,%r8
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cmovzq %r11,%r9
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cmovzq %r12,%rbx
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cmovzq %r13,%rcx
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cmovzq %r14,%rbp
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leaq 2(%r9),%rax
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shrq $1,%r8
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shrq $2,%rax
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addq %rcx,%rcx
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leaq (%rax,%rbp,1),%rbp
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subq %r15,%rcx
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subl $1,%edi
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jnz .Loop_30
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shrq $32,%r15
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movl %ebx,%eax
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shrq $32,%rbx
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movl %ecx,%edx
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shrq $32,%rcx
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subq %r15,%rax
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subq %r15,%rbx
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subq %r15,%rdx
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subq %r15,%rcx
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#ifdef __SGX_LVI_HARDENING__
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popq %r8
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lfence
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jmpq *%r8
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ud2
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#else
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.byte 0xf3,0xc3
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#endif
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.def __inner_loop_48; .scl 3; .type 32; .endef
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.p2align 5
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__inner_loop_48:
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.byte 0xf3,0x0f,0x1e,0xfa
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movl $48,%edi
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.Loop_48:
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movq %r8,%rax
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andq %r9,%rax
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shrq $1,%rax
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cmpq %r9,%r8
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movq %r8,%r10
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movq %r9,%r11
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leaq (%rax,%rbp,1),%rax
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movq %rbp,%r12
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cmovbq %r9,%r8
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cmovbq %r10,%r9
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cmovbq %rax,%rbp
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subq %r9,%r8
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testq $1,%r10
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cmovzq %r10,%r8
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cmovzq %r11,%r9
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cmovzq %r12,%rbp
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leaq 2(%r9),%rax
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shrq $1,%r8
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shrq $2,%rax
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addq %rax,%rbp
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subl $1,%edi
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jnz .Loop_48
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#ifdef __SGX_LVI_HARDENING__
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popq %rdx
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lfence
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jmpq *%rdx
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ud2
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#else
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.byte 0xf3,0xc3
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#endif
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.section .pdata
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.p2align 2
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.rva .LSEH_begin_ct_is_square_mod_384
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.rva .LSEH_body_ct_is_square_mod_384
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.rva .LSEH_info_ct_is_square_mod_384_prologue
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.rva .LSEH_body_ct_is_square_mod_384
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.rva .LSEH_epilogue_ct_is_square_mod_384
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.rva .LSEH_info_ct_is_square_mod_384_body
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.rva .LSEH_epilogue_ct_is_square_mod_384
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.rva .LSEH_end_ct_is_square_mod_384
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.rva .LSEH_info_ct_is_square_mod_384_epilogue
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.section .xdata
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.p2align 3
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.LSEH_info_ct_is_square_mod_384_prologue:
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.byte 1,0,5,0x0b
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.byte 0,0x74,1,0
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.byte 0,0x64,2,0
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.byte 0,0xb3
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.byte 0,0
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.long 0,0
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.LSEH_info_ct_is_square_mod_384_body:
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.byte 1,0,18,0
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.byte 0x00,0xf4,0x43,0x00
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.byte 0x00,0xe4,0x44,0x00
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.byte 0x00,0xd4,0x45,0x00
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.byte 0x00,0xc4,0x46,0x00
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.byte 0x00,0x34,0x47,0x00
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.byte 0x00,0x54,0x48,0x00
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.byte 0x00,0x74,0x4a,0x00
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.byte 0x00,0x64,0x4b,0x00
|
|
.byte 0x00,0x01,0x49,0x00
|
|
.byte 0x00,0x00,0x00,0x00
|
|
.byte 0x00,0x00,0x00,0x00
|
|
.LSEH_info_ct_is_square_mod_384_epilogue:
|
|
.byte 1,0,4,0
|
|
.byte 0x00,0x74,0x01,0x00
|
|
.byte 0x00,0x64,0x02,0x00
|
|
.byte 0x00,0x00,0x00,0x00
|
|
|