zeekayandHanzo Dev b1e39595f7 bench(dex): GPU-native deterministic per-book matcher harnesses ...

Standalone microbenchmarks for the deterministic CLOB matcher (one thread per
book, sequential price-time priority, parity-checked vs OpenMP CPU) across all
three GPU makers: CUDA, HIP, Metal.

Optimization: order-major SoA layout coalesces warp reads (adjacent books read
contiguous words instead of DEPTH-strided). Pure memory-access change; identical
deterministic fills (parity MATCH at every N).

Measured, tuned per backend (taker orders/sec):
- AMD Radeon 8060S (HIP, SoA preload TPB=64): 12.76B  (1.94B baseline, 6.6x)
- NVIDIA GB10      (CUDA, SoA lowreg TPB=32):  9.13B  (1.54B baseline, 5.9x)
- Apple M4 Max     (Metal, AoS TPB=256):       5.60B  (SoA neutral on unified mem)
- Apple M1 Max     (Metal):                    2.80B

Findings: coalescing is a discrete/APU-memory win (neutral-to-negative on Apple
unified memory); NVIDIA is occupancy-bound (prefers lowreg/small blocks) while
AMD is bandwidth-rich (prefers register-resident preload) — opposite optima.

Includes dex_tune.cu (TPB x variant sweep) + per-backend build/tune scripts.

Co-authored-by: Hanzo Dev <[email protected]>

2026-07-01 23:59:20 -07:00

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bench

bench(dex): GPU-native deterministic per-book matcher harnesses

2026-07-01 23:59:20 -07:00