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75 lines
3.4 KiB
TeX
75 lines
3.4 KiB
TeX
\section{Architecture}
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\label{sec:architecture}
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\cevm{} comprises four stages per block: dependency analysis, parallel execution, conflict detection, and sequential re-execution.
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\subsection{Transaction Dependency Analysis}
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\begin{definition}[Read-Write Set]
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For transaction $t$, let $R(t) \subseteq \mathcal{S}$ denote state slots read and $W(t) \subseteq \mathcal{S}$ slots written, where $\mathcal{S}$ is the global state-slot universe.
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\end{definition}
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\begin{definition}[Independence]
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Transactions $t_i, t_j$ are \emph{independent} iff:
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\begin{equation}
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W(t_i) \cap W(t_j) = \emptyset \;\wedge\; W(t_i) \cap R(t_j) = \emptyset \;\wedge\; R(t_i) \cap W(t_j) = \emptyset
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\end{equation}
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\end{definition}
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\cevm{} estimates read-write sets via static analysis of calldata and contract bytecode.
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For simple transfers and well-typed calls, analysis is exact.
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For dynamic dispatch (\texttt{DELEGATECALL} chains), it over-approximates, conservatively placing ambiguous transactions in the conflict set.
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The dependency graph $G = (T, E)$ has edge $(t_i, t_j) \in E$ iff $t_i, t_j$ are not independent.
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The maximal independent set $I \subseteq T$ is computed via greedy graph coloring in $O(n \log n)$, with conflict set $C = T \setminus I$.
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\begin{algorithm}
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\caption{Transaction Partitioning}
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\label{alg:partition}
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\begin{algorithmic}[1]
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\REQUIRE Transaction set $T = \{t_1, \ldots, t_n\}$, state snapshot $\sigma$
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\ENSURE Independent set $I$, conflict set $C$
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\STATE Compute $R(t_i), W(t_i)$ for each $t_i$ via static analysis
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\STATE Build dependency graph $G = (T, E)$
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\STATE $I \gets \text{GreedyMaxIndependentSet}(G)$
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\STATE $C \gets T \setminus I$
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\RETURN $I, C$
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\end{algorithmic}
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\end{algorithm}
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\subsection{Parallel Execution}
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Transactions in $I$ are dispatched to GPU streaming multiprocessors (SMs).
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Each SM executes one transaction against a read-only snapshot of $\sigma_{\text{pre}}$ in GPU global memory.
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State writes buffer in per-transaction write logs in SM-local shared memory.
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No cross-transaction communication occurs during parallel execution.
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The GPU kernel implements the full EVM instruction set in CUDA C++, including Cancun hard fork opcodes (EIP-4844).
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\subsection{Conflict Detection and Re-execution}
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After parallel execution, write logs are merged.
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If two transactions in $I$ wrote to the same slot---a false negative in static analysis---a conflict is detected.
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\begin{definition}[Execution Conflict]
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A conflict exists between $t_i, t_j \in I$ if $W_{\text{actual}}(t_i) \cap W_{\text{actual}}(t_j) \neq \emptyset$.
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\end{definition}
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Conflicting transactions move to $C$ and the merge restarts.
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False negatives occur in fewer than 0.3\% of transactions.
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The conflict set $C$ executes \emph{sequentially} on CPU, ordered by block index, against the state from applying $I$'s merged writes to $\sigma_{\text{pre}}$.
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\begin{theorem}[Deterministic Execution]
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\label{thm:deterministic}
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For any block $B$ with transaction set $T$, \cevm{} produces a unique state root $\sigma_{\text{post}}$ independent of partition $(I, C)$, provided $C$ executes sequentially in block order.
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\end{theorem}
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\begin{proof}
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$I$ has pairwise-disjoint write sets; commutativity of disjoint updates ensures the merged state equals any sequential ordering of $I$.
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$C$ then applies sequentially in canonical order.
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Since sequential execution is deterministic and the base state is unique, $\sigma_{\text{post}}$ is unique.
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\end{proof}
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%% ---------------------------------------------------------------------------
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