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zeekayandHanzo Dev
b1e39595f7
Standalone microbenchmarks for the deterministic CLOB matcher (one thread per book, sequential price-time priority, parity-checked vs OpenMP CPU) across all three GPU makers: CUDA, HIP, Metal. Optimization: order-major SoA layout coalesces warp reads (adjacent books read contiguous words instead of DEPTH-strided). Pure memory-access change; identical deterministic fills (parity MATCH at every N). Measured, tuned per backend (taker orders/sec): - AMD Radeon 8060S (HIP, SoA preload TPB=64): 12.76B (1.94B baseline, 6.6x) - NVIDIA GB10 (CUDA, SoA lowreg TPB=32): 9.13B (1.54B baseline, 5.9x) - Apple M4 Max (Metal, AoS TPB=256): 5.60B (SoA neutral on unified mem) - Apple M1 Max (Metal): 2.80B Findings: coalescing is a discrete/APU-memory win (neutral-to-negative on Apple unified memory); NVIDIA is occupancy-bound (prefers lowreg/small blocks) while AMD is bandwidth-rich (prefers register-resident preload) — opposite optima. Includes dex_tune.cu (TPB x variant sweep) + per-backend build/tune scripts. Co-authored-by: Hanzo Dev <[email protected]>
24 lines
1.4 KiB
Bash
Executable File
24 lines
1.4 KiB
Bash
Executable File
#!/bin/bash
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# tune_hip.sh — occupancy/register sweep of the SoA matcher on AMD (ROCm/HIP).
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# Sweeps threads-per-block x kernel variant; prints M orders/sec + CPU speedup + parity.
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# variant 0 = preload (rp/rq/rs register-resident) variant 1 = lowreg (only rem[] in regs)
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# AMD 8060S tuned optimum: variant=0 (preload), TPB=64. (lowreg HURTS AMD — opposite of NVIDIA.)
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set -e
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export PATH=/opt/rocm/bin:$PATH
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export LD_LIBRARY_PATH=/opt/rocm/lib:$LD_LIBRARY_PATH
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here=$(cd "$(dirname "$0")" && pwd)
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sed -e 's/#include <cuda_runtime.h>/#include <hip\/hip_runtime.h>/' \
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-e 's/cudaMalloc/hipMalloc/g' -e 's/cudaMemcpyHostToDevice/hipMemcpyHostToDevice/g' \
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-e 's/cudaMemcpyDeviceToHost/hipMemcpyDeviceToHost/g' -e 's/cudaMemcpy/hipMemcpy/g' \
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-e 's/cudaDeviceSynchronize/hipDeviceSynchronize/g' -e 's/cudaGetLastError/hipGetLastError/g' \
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-e 's/cudaError_t/hipError_t/g' -e 's/cudaSuccess/hipSuccess/g' \
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-e 's/cudaGetErrorString/hipGetErrorString/g' -e 's/cudaDeviceProp/hipDeviceProp_t/g' \
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-e 's/cudaGetDeviceProperties/hipGetDeviceProperties/g' \
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"$here/dex_tune.cu" > /tmp/dex_tune.hip.cpp
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hipcc -O3 -fopenmp -o /tmp/dex_tune /tmp/dex_tune.hip.cpp 2>/dev/null
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set +e
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echo "=== AMD sweep (N=4M) — var0=preload var1=lowreg ==="
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for V in 0 1; do for T in 32 64 128 256 512; do /tmp/dex_tune 4000000 "$T" "$V"; done; done
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echo "--- tuned optimum confirm @N=16M (preload, TPB=64) ---"
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/tmp/dex_tune 16000000 64 0
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